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AS4SD4M16DG-10/XT 参数 Datasheet PDF下载

AS4SD4M16DG-10/XT图片预览
型号: AS4SD4M16DG-10/XT
PDF下载: 下载PDF文件 查看货源
内容描述: 4梅格×16 SDRAM同步动态随机存取存储 [4 Meg x 16 SDRAM Synchronous DRAM Memory]
分类和应用: 存储内存集成电路光电二极管动态存储器时钟
文件页数/大小: 50 页 / 1139 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
 浏览型号AS4SD4M16DG-10/XT的Datasheet PDF文件第27页浏览型号AS4SD4M16DG-10/XT的Datasheet PDF文件第28页浏览型号AS4SD4M16DG-10/XT的Datasheet PDF文件第29页浏览型号AS4SD4M16DG-10/XT的Datasheet PDF文件第30页浏览型号AS4SD4M16DG-10/XT的Datasheet PDF文件第32页浏览型号AS4SD4M16DG-10/XT的Datasheet PDF文件第33页浏览型号AS4SD4M16DG-10/XT的Datasheet PDF文件第34页浏览型号AS4SD4M16DG-10/XT的Datasheet PDF文件第35页  
SDRAM  
AS4SD4M16  
Austin Semiconductor, Inc.  
CAPACITANCE  
PARAMETER  
SYMBOL  
MAX  
4.0  
UNITS  
pF  
NOTES  
CI1  
2
2
2
Input Capacitance: CLK  
CI2  
5.0  
pF  
Input Capacitance: All other input-only pins  
Input/Output Capacitance: DQs  
CIO  
6.5  
pF  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS  
(Notes:5, 6, 8, 9, 11) (-55oC<TA<+125oC)  
-8  
-10  
PARAMETER  
SYM  
UNITS NOTES  
MIN  
MAX  
MIN  
MAX  
tAC  
tAC  
CL = 3  
CL = 2  
6.5  
7
ns  
Access time from CLK (pos. edge)  
9
9
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
22  
tAH  
Address hold time  
Address setup time  
CLK high-level width  
CLK low-level width  
1
2
1
3
tAS  
tCH  
tCL  
3
3.5  
3.5  
10  
15  
1
3
tCK  
CL = 3  
CL = 2  
8
24  
Clock cycle time  
tCK  
12  
1
22, 24  
tCKH  
tCKS  
tCMH  
tCMS  
tDH  
tDS  
CKE hold time  
CKE setup time  
2
3
CS#, RAS#, CAS#, WE#, DQM hold time  
CS#, RAS#, CAS#, WE#, DQM setup time  
Data-in hold time  
1
1
2
3
1
1
Data-in setup time  
2
3
tHZ  
CL = 3  
CL = 2  
6
7
8
10  
10  
Data-out high-impedance time  
tHZ  
10  
tLZ  
Data-out low-impedance time  
Data-out hold time  
1
1
tOH  
tRAS  
tRC  
tRCD  
tREF  
tREF  
tRP  
2.5  
50  
80  
20  
2.5  
60  
90  
30  
ACTIVE to PRECHARGE command  
AUTO REFRESH, ACTIVE command period  
80,000  
80,000 ns  
ns  
ns  
22  
22  
ACTIVE to READ or WRITE delay  
Refresh period (4,096 rows) -40 to +85 degrees C  
64  
16  
64  
16  
ms  
ms  
ns  
Refresh period (4,096 rows) -55 to +125 degrees C  
PRECHARGE command period  
ACTIVE bank A to ACTIVE bank B command  
Transition time  
24  
20  
30  
20  
1
22  
tRRD  
tT  
ns  
0.3  
1.2  
1.2  
-
ns  
7
1 CLK +  
8ns  
1 CLK +  
8ns  
25  
tWR  
WRITE recovery time  
A2 version  
15  
15  
ns  
ns  
26  
20  
tXSR  
Exit SELF REFRESH to ACTIVE command  
80  
90  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS4SD4M16  
Rev. 1.5 10/01  
31  
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