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AS4DDR32M16 参数 Datasheet PDF下载

AS4DDR32M16图片预览
型号: AS4DDR32M16
PDF下载: 下载PDF文件 查看货源
内容描述: 8梅格×16× 4银行双倍数据速率SDRAM婴儿床,塑封微电路 [8 Meg x 16 x 4 Banks Double Data Rate SDRAM COTS, Plastic Encapsulated Microcircuit]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 64 页 / 7665 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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Austin Semiconductor, Inc.
DESELECT
The DESELECT function (CS# HIGH) prevents new
commands from being executed by the DDR SDRAM. The DDR
SDRAM is effectively deselected. Operations already in
progress are not affected.
COTS
COTS PEM
SDRAM
AS4DDR32M16
NO OPERATION (NOP)
The NO OPERATION (NOP) command is used to instruct
the selected DDR SDRAM to perform a NOP (CS# is LOW with
RAS#, CAS#, and WE# are HIGH). This prevents unwanted
commands from being registered during idle or wait states.
Operations already in progress are not affected.
row will remain open for subsequent accesses. Input data ap-
pearing on the DQ is written to the memory array
subject to the DM input logic level appearing coincident with
the data. If a given DM signal is registered LOW, the
corresponding data will be written to memory; if the DM signal
is registered HIGH, the corresponding data inputs will be ig-
nored, and a WRITE will not be executed to that byte/column
location.
PRECHARGE
The PRECHARGE command is used to deactivate the open
row in a particular bank or the open row in all banks. The bank(s)
will be available for a subsequent row access a specified time
(
t
RP) after the precharge command is issued. Except in the case
of concurrent auto precharge, where a READ or WRITE
command to a different bank is allowed as long as it does not
interrupt the data transfer in the current bank and does not
violate any other timing parameters. Input A10 determines
whether one or all banks are to be precharged, and in the case
where only one bank is to be precharged, inputs BA0, BA1
select the bank. Otherwise BA0, BA1 are treated as “Don’t
Care.” Once a bank has been precharged, it is in the idle state
and must be activated prior to any READ or WRITE commands
being issued to that bank. A PRECHARGE command will be
treated as a NOP if there is no open row in that bank (idle state),
or if the previously open row is already in the process of
precharging.
LOAD MODE REGISTER
The mode registers are loaded via inputs A0–A12. See mode
register descriptions in the Register Definition section. The
LOAD MODE REGISTER command can only be issued when
all banks are idle, and a subsequent executable command
cannot be issued until
t
MRD is met.
ACTIVE
The ACTIVE command is used to open (or activate) a row in
a particular bank for a subsequent access. The value on the
BA0, BA1 inputs selects the bank, and the address provided
on inputs A0–A12 selects the row. This row remains active (or
open) for accesses until a precharge command is issued to that
bank. A precharge command must be issued before opening a
different row in the same bank.
AUTO PRECHARGE
Auto precharge is a feature which performs the same
individual-bank precharge function described above, but
without requiring an explicit command. This is accomplished
by using A10 to enable auto precharge in conjunction with a
specific READ or WRITE command. A precharge of the bank/
row that is addressed with the READ or WRITE command is
automatically performed upon completion of the READ or
WRITE burst. Auto precharge is nonpersistent in that it is
either enabled or disabled for each individual Read or Write
command. This device supports concurrent auto precharge if
the command to the other bank does not interrupt the data
transfer to the current bank.
Auto precharge ensures that the precharge is initiated at the
earliest valid stage within a burst. This “earliest valid stage” is
determined as if an explicit PRECHARGE command was issued
at the earliest possible time, without violating
t
RAS (MIN), as
described for each burst type in the Operation section of this
data sheet. The user must not issue another command to the
same bank until the precharge time (
t
RP) is completed.
READ
The READ command is used to initiate a burst read access
to an active row. The value on the BA0, BA1 inputs selects the
bank, and the address provided on inputs A0–A9 selects the
starting column location. The value on input A10 determines
whether or not auto precharge is used. If auto precharge is
selected, the row being accessed will be precharged at the end
of the READ burst; if auto precharge is not selected, the row
will remain open for subsequent accesses.
WRITE
The WRITE command is used to initiate a burst write access
to an active row. The value on the BA0, BA1 inputs selects the
bank, and the address provided on inputs A0–A9 selects the
starting column location. The value on input A10 determines
whether or not auto precharge is used. If auto precharge is
selected, the row being accessed will be precharged at the end
of the WRITE burst; if auto precharge is not
selected, the
AS4DDR32M16
Rev. 1.5 06/06
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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