PEM
Austin Semiconductor, Inc.
AS28F128J3M
Q-Flash
Memory Command Set Operations:
Command
READ ARRAY
READ IDENTIFIER CODES
READ QUERY
READ STATUS REGISTER
CLEAR STATUS REGISTER
WRITE TO BUFFER
WORD/BYTE PROGRAM
BLOCK ERASE
BLOCK ERASE/PROGRAM
SUSPEND
BLOCK ERASE/PROGRAM
RESUME
CONFIGURATION
SET BLOCK LOCK BITS
CLEAR BLOCK LOCK BITS
PROTECTION PROGRAM
Key:
[IA]
[ID]
[BA]
[QA]
[PA]
[QD]
[SRD]
Notes
[1]
[2]
[3]
[4]
Scalable or Basic Command
Set [SCS or BCS]
SCS / BCS
SCS / BCS
SCS
SCS / BCS
SCS / BCS
SCS / BCS
SCS / BCS
SCS / BCS
SCS / BCS
SCS / BCS
SCS
SCS
SCS
First Bus Cycle
Bus Cycles Operation
Address
1
WRITE
X
>/= 2
WRITE
X
2
1
>2
2
2
1
1
2
2
2
2
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
X
X
X
BA
X
BA
X
X
X
X
X
X
Data
FFh
90h
98h
70h
50h
E8h
40h or 10h
20h
B0h
D0h
B8h
60h
60h
C0h
WRITE
WRITE
WRITE
WRITE
X
BA
X
PA
CC
01h
D0h
PD
Second Bus Cycle
Operation
Address
Data
READ
READ
READ
WRITE
WRITE
WRITE
IA
QA
X
BA
PA
BA
ID
QD
SRD
N
PD
D0h
Notes
1
2
3, 4, 5
6, 7
5, 6
7, 8
7
Identifier Code address
Data read from identifier Code
Address within a Block
Query data base Address
Address of Memory location to be programmed
Data read from Query data base
Data read from Status Register
[5]
[6]
[7]
[8]
Following the READ IDENTIFIER CODES command, READ operations access manufacturer, device, and block lock codes.
If the ISM is running, only DQ7 is valid; DQ15-DQ8 and DQ6-DQ0 are placed in High-Z
After the WRITE-to-BUFFER command is issued, check the XSR to make sure a buffer is available for WRITING
The number of Bytes/words to be written to the write buffer = n+1, where n=byte/word count argument. Count ranges on this device
for byte mode are n=00H to n=1Fh and for word mode, n=0000h to 000Fh. The third and consecutive bus cycles, as determined by n,
are for writing data into the write buffer. The CONFIRM command (D0h) is expected after exactly n+1 WRITE cycles; any other
command at that point in the sequence aborts the WRITE-to-BUFFER operation.
The WRITE-to-BUFFER or ERASE operation does not begin until a CONFIRM command (D0h) is issued
Attempts to issue a BLOCK ERASE or PROGRAM to a locked block will fail
Etiher 40h or 10h is recognized by the ISM as the byte/word program setup
PROGRAM SUSPEND can be issued after either the WRITE-to-BUFFER or WORD/BYTE PROGRAM operation is inititated.
The CLEAR BLOCK LOCK BITS operation simultaneously clears all block lock bits.
AS28F128J3MRG
Revision 5.0 11/23/04
Austin Semiconductor, Inc. reserves the right to change products or modify product specifications with appropriate notification
For Additional Products and Information visit out Web site at
www.austinsemiconductor.com
5
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