TRUTH TABLE (See Notes 1 through 4)
2, 4
Next Cycle
Deselect
Address Used
None
Ex
1
ADSP
Gx
X
0
DQx
High–Z
DQ
WRITE
0
0
1
1
0
1
X
Begin Read
Read
External
Current
0
Read
Read
Read
Write
Write
X
X
0
1
High–Z
DQ
Read
Current
0
Begin Write
Write
External
Current
X
X
High–Z
High–Z
X
NOTES:
1. X = don’t care, 1 = logic high, 0 = logic low.
2. Write is defined as either any BWx or WE low.
3. Gx is an asynchronous signal and is not sampled by the clock K. Gx drives the bus immediately (t
) following Gx going low.
GLQX
4. On write cycles that follow read cycles, Gx must be negated prior to the start of the write cycle to ensure proper write data setup times. Gx
must also remain negated at the completion of the write cycle to ensure proper write data hold times.
ABSOLUTE MAXIMUM RATINGS (Voltages Referenced to V
SS
= 0 V)
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
This BiCMOS memory circuit has been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established.
Rating
Power Supply Voltage
Voltage Relative to V
Symbol
Value
Unit
V
V
DD
– 0.5 to + 4.6
V , V
in out
– 0.5 to V
DD
+ 0.5
V
SS
Output Current (per I/O)
Ambient Temperature
Die Temperature
I
± 20
mA
°C
°C
°C
°C
out
T
A
0 to 70
110
T
J
Temperature Under Bias
Storage Temperature
T
bias
– 10 to + 85
– 55 to + 125
This device contains circuitry that will
ensure the output devices are in High–Z at
power up.
T
stg
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
MCM36F6•MCM36F7
MOTOROLA FAST SRAM
6
AUK [ AUK CORP ]
