PIN DESCRIPTIONS
Pin Locations
Symbol
Type
Description
3, 4, 5, 6, 7, 8, 17, 18, 19,
20, 21, 22, 27, 28, 29, 30,
A0 – A15
Input
Synchronous Address Inputs: These inputs are registered and
must meet setup and hold times.
82
ADSP
Input
Input
SynchronousAddresss Status Controller: Initiates read, write, or
chip deselect cycle.
39, 40, 103, 104
73, 74, 141, 142
BW0 – BW3
Synchronous Byte Write Inputs: x refers to the byte being written
(byte a, b, c, d). WE overrides BWx.
DP0 – DP3
Synchronous Parity Data Inputs/Outputs.
Synchronous Data Inputs/Outputs.
(a) 49, 50, 53, 54, 55, 56, 57, 58,
(b) 63, 64, 65, 66, 69, 70, 71, 72
DQ0 – DQ31
I/O
(c) 109, 110, 111, 112, 125, 126, 129, 130
(d) 131, 132, 133, 134, 135, 136, 139, 140
41, 105
E0, E1
Input
Synchronous Chip Enable: Active low to enable chip. Negated
high — deselects chip when ADSP is asserted.
42, 106
G0, G1
Input
Input
Asynchronous Output Enable Input.
46, 45, 122, 121
K0 – K3
Clock: This signal registers the address, data in, and all control
signals except G.
35, 36
81
PD0, PD1
WE
Output Presence Detect Bits.
Input Synchronous Global Write: This signal writes all bytes
regardless of the status of the BWx signals. If only byte write
signals SBx are being used, tie this pin high.
9, 10, 25, 26, 51, 52,
61, 62, 85, 86, 93,
V
DD
Supply Power Supply: 3.3 V + 10%, – 5%.
94, 107, 108, 137, 138
1, 2, 15, 16, 33, 34, 37, 38, 43, 44, 47, 48,
59, 60, 67, 68, 79, 80, 101, 102, 119, 120,
123, 124, 127, 128, 143, 144
V
SS
Supply Ground.
11, 12, 13, 14, 23, 24, 31,
32, 75, 76, 77, 78, 83, 84,
87, 88, 89, 90, 91, 92, 95,
96, 97, 98, 99, 100, 113,
114, 115, 116, 117, 118
NC
—
No Connection: There is no connection to the chip.
MCM36F6•MCM36F7
MOTOROLA FAST SRAM
5
AUK [ AUK CORP ]
