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MEGA128CAN 参数 Datasheet PDF下载

MEGA128CAN图片预览
型号: MEGA128CAN
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有ISP功能的Flash和CAN控制器128K字节 [Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER]
分类和应用: 微控制器
文件页数/大小: 413 页 / 5507 K
品牌: ATMEL [ ATMEL ]
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AT90CAN128  
The following code example shows how to set port B pins 0 and 1 high, 2 and 3 low, and  
define the port pins from 4 to 7 as input with pull-ups assigned to port pins 6 and 7. The  
resulting pin values are read back again, but as previously discussed, a nop instruction  
is included to be able to read back the value recently assigned to some of the pins.  
Assembly Code Example(1)  
...  
; Define pull-ups and set outputs high  
; Define directions for port pins  
ldi  
ldi  
out  
out  
r16, (1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0)  
r17, (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0)  
PORTB, r16  
DDRB, r17  
; Insert nop for synchronization  
nop  
; Read port pins  
in  
r16, PINB  
...  
C Code Example  
unsigned char i;  
...  
/* Define pull-ups and set outputs high */  
/* Define directions for port pins */  
PORTB = (1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0);  
DDRB = (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0);  
/* Insert nop for synchronization*/  
_NOP();  
/* Read port pins */  
i = PINB;  
...  
Note:  
1. For the assembly program, two temporary registers are used to minimize the time  
from pull-ups are set on pins 0, 1, 6, and 7, until the direction bits are correctly set,  
defining bit 2 and 3 as low and redefining bits 0 and 1 as strong high drivers.  
Digital Input Enable and Sleep As shown in Figure 31, the digital input signal can be clamped to ground at the input of  
Modes  
the schmitt-trigger. The signal denoted SLEEP in the figure, is set by the MCU Sleep  
Controller in Power-down mode, Power-save mode, and Standby mode to avoid high  
power consumption if some input signals are left floating, or have an analog signal level  
close to VCC/2.  
SLEEP is overridden for port pins enabled as external interrupt pins. If the external inter-  
rupt request is not enabled, SLEEP is active also for these pins. SLEEP is also  
overridden by various other alternate functions as described in “Alternate Port Func-  
tions” on page 67.  
If a logic high level (“one”) is present on an Asynchronous External Interrupt pin config-  
ured as “Interrupt on Rising Edge, Falling Edge, or Any Logic Change on Pin” while the  
external interrupt is not enabled, the corresponding External Interrupt Flag will be set  
when resuming from the above mentioned sleep modes, as the clamping in these sleep  
modes produces the requested logic change.  
65  
4250E–CAN–12/04  
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