Description
The AT90CAN128 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle,
the AT90CAN128 achieves throughputs approaching 1 MIPS per MHz allowing the sys-
tem designer to optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with 32 general purpose working registers.
All 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two
independent registers to be accessed in one single instruction executed in one clock
cycle. The resulting architecture is more code efficient while achieving throughputs up to
ten times faster than conventional CISC microcontrollers.
The AT90CAN128 provides the following features: 128K bytes of In-System Program-
mable Flash with Read-While-Write capabilities, 4K bytes EEPROM, 4K bytes SRAM,
53 general purpose I/O lines, 32 general purpose working registers, a CAN controller,
Real Time Counter (RTC), four flexible Timer/Counters with compare modes and PWM,
2 USARTs, a byte oriented Two-wire Serial Interface, an 8-channel 10-bit ADC with
optional differential input stage with programmable gain, a programmable Watchdog
Timer with Internal Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG test
interface, also used for accessing the On-chip Debug system and programming and five
software selectable power saving modes.
The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI/CAN ports
and interrupt system to continue functioning. The Power-down mode saves the register
contents but freezes the Oscillator, disabling all other chip functions until the next inter-
rupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run,
allowing the user to maintain a timer base while the rest of the device is sleeping. The
ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous
Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode,
the Crystal/Resonator Oscillator is running while the rest of the device is sleeping. This
allows very fast start-up combined with low power consumption.
The device is manufactured using Atmel’s high-density nonvolatile memory technology.
The On-chip ISP Flash allows the program memory to be reprogrammed in-system
through an SPI serial interface, by a conventional nonvolatile memory programmer, or
by an On-chip Boot program running on the AVR core. The boot program can use any
interface to download the application program in the application Flash memory. Soft-
ware in the Boot Flash section will continue to run while the Application Flash section is
updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU
with In-System Self-Programmable Flash on a monolithic chip, the Atmel AT90CAN128
is a powerful microcontroller that provides a highly flexible and cost effective solution to
many embedded control applications.
The AT90CAN128 AVR is supported with a full suite of program and system develop-
ment tools including: C compilers, macro assemblers, program debugger/simulators, in-
circuit emulators, and evaluation kits.
Applications that use the ATmega128 AVR microcontroller can be made compatible to
use the AT90CAN128, refer to Application Note AVR 096, on the Atmel web site.
Disclaimer
Typical values contained in this datasheet are based on simulations and characteriza-
tion of other AVR microcontrollers manufactured on the same process technology. Min
and Max values will be available after the device is characterized.
2
AT90CAN128
4250E–CAN–12/04
ATMEL [ ATMEL CORPORATION ]
