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ATMEGA64A-AU 参数 Datasheet PDF下载

ATMEGA64A-AU图片预览
型号: ATMEGA64A-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有64K字节的系统内可编程闪存 [8-bit Microcontroller with 64K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 7964 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA64A-AU的Datasheet PDF文件第247页浏览型号ATMEGA64A-AU的Datasheet PDF文件第248页浏览型号ATMEGA64A-AU的Datasheet PDF文件第249页浏览型号ATMEGA64A-AU的Datasheet PDF文件第250页浏览型号ATMEGA64A-AU的Datasheet PDF文件第252页浏览型号ATMEGA64A-AU的Datasheet PDF文件第253页浏览型号ATMEGA64A-AU的Datasheet PDF文件第254页浏览型号ATMEGA64A-AU的Datasheet PDF文件第255页  
ATmega64A  
• ADC9:0: ADC Conversion Result  
These bits represent the result from the conversion, as detailed in “ADC Conversion Result” on  
page 245.  
23.9.4  
ADCSRB – ADC Control and Status Register B  
Bit  
(0x8E)  
7
6
5
4
3
2
ADTS2  
R/W  
0
1
ADTS1  
R/W  
0
0
ADTS0  
R/W  
0
ADCSRB  
Read/Write  
Initial Value  
R
0
R
0
R
0
R
0
R
0
• Bits 7:3 – Res: Reserved Bits  
These bits are reserved bits in the ATmega64A and will always read as zero.  
• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source  
If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger  
an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion  
will be triggered by the rising edge of the selected interrupt flag. Note that switching from a trig-  
ger source that is cleared to a trigger source that is set, will generate a positive edge on the  
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running  
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set.  
Table 23-6. ADC Auto Trigger Source Selections  
ADTS2  
ADTS1  
ADTS0  
Trigger Source  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Free Running mode  
Analog Comparator  
External Interrupt Request 0  
Timer/Counter0 Compare Match  
Timer/Counter0 Overflow  
Timer/Counter1 Compare Match B  
Timer/Counter1 Overflow  
Timer/Counter1 Capture Event  
251  
8160C–AVR–07/09  
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