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ATMEGA64A-AU 参数 Datasheet PDF下载

ATMEGA64A-AU图片预览
型号: ATMEGA64A-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有64K字节的系统内可编程闪存 [8-bit Microcontroller with 64K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 7964 K
品牌: ATMEL [ ATMEL ]
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ATmega64A  
23. Analog to Digital Converter  
23.1 Features  
10-bit Resolution  
0.75 LSB Integral Non-linearity  
1.5 LSB Absolute Accuracy  
13 - 260 µs Conversion Time  
Up to 15 kSPS at Maximum Resolution  
Eight Multiplexed Single Ended Input Channels  
Seven Differential Input Channels  
Two Differential Input Channels with Optional Gain of 10x and 200x  
Optional Left Adjustment for ADC Result Readout  
0 - VCC ADC Input Voltage Range  
2.7 - VCC Differential ADC Voltage Range  
Selectable 2.56V ADC Reference Voltage  
Free Running or Single Conversion Mode  
ADC Start Conversion by Auto Triggering on Interrupt Sources  
Interrupt on ADC Conversion Complete  
Sleep Mode Noise Canceler  
23.2 Overview  
The ATmega64A features a 10-bit successive approximation ADC. The ADC is connected to an  
8-channel Analog Multiplexer which allows eight single-ended voltage inputs constructed from  
the pins of Port F. The single-ended voltage inputs refer to 0V (GND).  
The device also supports 16 differential voltage input combinations. Two of the differential inputs  
(ADC1, ADC0 and ADC3, ADC2) are equipped with a programmable gain stage, providing  
amplification steps of 0 dB (1x), 20 dB (10x), or 46 dB (200x) on the differential input voltage  
before the A/D conversion. Seven differential analog input channels share a common negative  
terminal (ADC1), while any other ADC input can be selected as the positive input terminal. If 1x  
or 10x gain is used, 8-bit resolution can be expected. If 200x gain is used, 7-bit resolution can be  
expected.  
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is  
held at a constant level during conversion. A block diagram of the ADC is shown in Figure 23-1.  
The ADC has a separate analog supply voltage pin, AVCC. AVCC must not differ more than  
0.3V from VCC. See the paragraph “ADC Noise Canceler” on page 241 on how to connect this  
pin.  
Internal reference voltages of nominally 2.56V or AVCC are provided On-chip. The voltage refer-  
ence may be externally decoupled at the AREF pin by a capacitor for better noise performance.  
233  
8160C–AVR–07/09  
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