ATmega64A
Figure 21-14. Formats and States in the Master Receiver Mode
MR
Successfull
S
SLA
R
A
DATA
A
DATA
A
P
reception
from a slave
receiver
$08
$40
$50
$58
Next transfer
started with a
repeated start
condition
RS
SLA
R
$10
Not acknowledge
received after the
slave address
W
A
P
$48
MT
Arbitration lost in slave
address or data byte
Other master
continues
Other master
continues
A or A
A
$38
A
$38
Arbitration lost and
addressed as slave
Other master
continues
To corresponding
states in slave mode
$68 $78 $B0
Any number of data bytes
and their associated acknowledge bits
From master to slave
From slave to master
DATA
A
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
n
21.7.3
Slave Receiver Mode
In the Slave Receiver mode, a number of data bytes are received from a master transmitter (see
Figure 21-15). All the status codes mentioned in this section assume that the prescaler bits are
zero or are masked to zero.
Figure 21-15. Data Transfer in Slave Receiver Mode
VCC
Device 1
SLAVE
RECEIVER
Device 2
MASTER
TRANSMITTER
Device 3
R1
R2
Device n
........
SDA
SCL
218
8160C–AVR–07/09
ATMEL [ ATMEL ]
