欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA64A-AU 参数 Datasheet PDF下载

ATMEGA64A-AU图片预览
型号: ATMEGA64A-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有64K字节的系统内可编程闪存 [8-bit Microcontroller with 64K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 7964 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA64A-AU的Datasheet PDF文件第212页浏览型号ATMEGA64A-AU的Datasheet PDF文件第213页浏览型号ATMEGA64A-AU的Datasheet PDF文件第214页浏览型号ATMEGA64A-AU的Datasheet PDF文件第215页浏览型号ATMEGA64A-AU的Datasheet PDF文件第217页浏览型号ATMEGA64A-AU的Datasheet PDF文件第218页浏览型号ATMEGA64A-AU的Datasheet PDF文件第219页浏览型号ATMEGA64A-AU的Datasheet PDF文件第220页  
ATmega64A  
Figure 21-13. Data Transfer in Master Receiver Mode  
VCC  
Device 1  
MASTER  
RECEIVER  
Device 2  
SLAVE  
TRANSMITTER  
Device 3  
R1  
R2  
Device n  
........  
SDA  
SCL  
A START condition is sent by writing the following value to TWCR:  
TWCR  
TWINT  
TWEA  
TWSTA  
TWSTO  
TWWC  
TWEN  
TWIE  
Value  
1
X
1
0
X
1
0
X
TWEN must be written to one to enable the Two-wire Serial Interface, TWSTA must be written to  
one to transmit a START condition and TWINT must be set to clear the TWINT flag. The TWI will  
then test the Two-wire Serial Bus and generate a START condition as soon as the bus becomes  
free. After a START condition has been transmitted, the TWINT flag is set by hardware, and the  
status code in TWSR will be 0x08 (see Table 21-2). In order to enter MR mode, SLA+R must be  
transmitted. This is done by writing SLA+R to TWDR. Thereafter the TWINT bit should be  
cleared (by writing it to one) to continue the transfer. This is accomplished by writing the follow-  
ing value to TWCR:  
TWCR  
TWINT  
TWEA  
TWSTA  
TWSTO  
TWWC  
TWEN  
TWIE  
Value  
1
X
0
0
X
1
0
X
When SLA+R have been transmitted and an acknowledgment bit has been received, TWINT is  
set again and a number of status codes in TWSR are possible. Possible status codes in Master  
mode are 0x38, 0x40, or 0x48. The appropriate action to be taken for each of these status codes  
is detailed in Table 21-5. Received data can be read from the TWDR Register when the TWINT  
flag is set high by hardware. This scheme is repeated until the last byte has been received. After  
the last byte has been received, the MR should inform the ST by sending a NACK after the last  
received data byte. The transfer is ended by generating a STOP condition or a repeated START  
condition. A STOP condition is generated by writing the following value to TWCR:  
TWCR  
TWINT  
TWEA  
TWSTA  
TWSTO  
TWWC  
TWEN  
TWIE  
Value  
1
X
0
1
X
1
0
X
A REPEATED START condition is generated by writing the following value to TWCR:  
TWCR  
TWINT  
TWEA  
TWSTA  
TWSTO  
TWWC  
TWEN  
TWIE  
Value  
1
X
1
0
X
1
0
X
After a repeated START condition (state 0x10) the Two-wire Serial Interface can access the  
same slave again, or a new slave without transmitting a STOP condition. Repeated START  
216  
8160C–AVR–07/09  
 复制成功!