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ATMEGA48PA-AU 参数 Datasheet PDF下载

ATMEGA48PA-AU图片预览
型号: ATMEGA48PA-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与4/8/ 16 / 32K字节的系统内可编程闪存 [8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 448 页 / 12817 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA48PA-AU的Datasheet PDF文件第80页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第81页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第82页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第83页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第85页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第86页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第87页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第88页  
ATmega48PA/88PA/168PA/328P  
(one)) to serve this function. The OC1A pin is also the output pin for the PWM mode timer  
function.  
PCINT1: Pin Change Interrupt source 1. The PB1 pin can serve as an external interrupt source.  
• ICP1/CLKO/PCINT0 – Port B, Bit 0  
ICP1, Input Capture Pin: The PB0 pin can act as an Input Capture Pin for Timer/Counter1.  
CLKO, Divided System Clock: The divided system clock can be output on the PB0 pin. The  
divided system clock will be output if the CKOUT Fuse is programmed, regardless of the  
PORTB0 and DDB0 settings. It will also be output during reset.  
PCINT0: Pin Change Interrupt source 0. The PB0 pin can serve as an external interrupt source.  
Table 13-4 and Table 13-5 on page 85 relate the alternate functions of Port B to the overriding  
signals shown in Figure 13-5 on page 80. SPI MSTR INPUT and SPI SLAVE OUTPUT consti-  
tute the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.  
Table 13-4. Overriding Signals for Alternate Functions in PB7..PB4  
Signal  
Name  
PB7/XTAL2/  
PB6/XTAL1/  
PB5/SCK/  
PCINT5  
PB4/MISO/  
PCINT4  
TOSC2/PCINT7(1)  
TOSC1/PCINT6(1)  
INTRC • EXTCK+  
AS2  
PUOE  
PUOV  
DDOE  
INTRC + AS2  
0
SPE • MSTR  
PORTB5 • PUD  
SPE • MSTR  
SPE • MSTR  
PORTB4 • PUD  
SPE • MSTR  
0
INTRC • EXTCK+  
AS2  
INTRC + AS2  
DDOV  
PVOE  
0
0
0
0
0
0
SPE • MSTR  
SPE • MSTR  
SPI SLAVE  
OUTPUT  
PVOV  
0
0
SCK OUTPUT  
PCINT5 • PCIE0  
1
INTRC • EXTCK +  
AS2 + PCINT7 •  
PCIE0  
INTRC + AS2 +  
PCINT6 • PCIE0  
DIEOE  
PCINT4 • PCIE0  
1
(INTRC + EXTCK) •  
AS2  
DIEOV  
DI  
INTRC • AS2  
PCINT5 INPUT  
SCK INPUT  
PCINT4 INPUT  
PCINT7 INPUT  
Oscillator Output  
PCINT6 INPUT  
SPI MSTR INPUT  
Oscillator/Clock  
Input  
AIO  
Notes: 1. INTRC means that one of the internal RC Oscillators are selected (by the CKSEL fuses),  
EXTCK means that external clock is selected (by the CKSEL fuses)  
84  
8161D–AVR–10/09