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ATMEGA16M1_1 参数 Datasheet PDF下载

ATMEGA16M1_1图片预览
型号: ATMEGA16M1_1
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有16K / 32K / 64K字节的系统内可编程闪存 [8-bit Microcontroller with 16K/32K/64K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 365 页 / 6381 K
品牌: ATMEL [ ATMEL ]
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ATmega16/32/64/M1/C1  
• Bit 4 – BERR: Bit Error (Only in Transmission)  
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine  
on the whole CANSTMOB register.  
The bit value monitored is different from the bit value sent.  
Exceptions: the monitored recessive bit sent as a dominant bit during the arbitration field and the  
acknowledge slot detecting a dominant bit during the sending of an error frame.  
• Bit 3 – SERR: Stuff Error  
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine  
on the whole CANSTMOB register.  
Detection of more than five consecutive bits with the same polarity. This flag can generate an  
interrupt.  
• Bit 2 – CERR: CRC Error  
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine  
on the whole CANSTMOB register.  
The receiver performs a CRC check on every de-stuffed received message from the start of  
frame up to the data field. If this checking does not match with the de-stuffed CRC field, a CRC  
error is set.  
• Bit 1 – FERR: Form Error  
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine  
on the whole CANSTMOB register.  
The form error results from one or more violations of the fixed form in the following bit fields:  
• CRC delimiter.  
• Acknowledgment delimiter.  
• EOF  
• Bit 0 – AERR: Acknowledgment Error  
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine  
on the whole CANSTMOB register.  
No detection of the dominant bit in the acknowledge slot.  
16.11.2 CAN MOb Control and DLC Register - CANCDMOB  
Bit  
7
6
5
4
IDE  
R/W  
-
3
DLC3  
R/W  
-
2
DLC2  
R/W  
-
1
DLC1  
R/W  
-
0
DLC0  
R/W  
-
CONMOB1 CONMOB0  
RPLV  
R/W  
-
CANCDMOB  
Read/Write  
Initial Value  
R/W  
-
R/W  
-
• Bit 7:6 – CONMOB1:0: Configuration of Message Object  
These bits set the communication to be performed (no initial value after RESET).  
– 00 - disable.  
– 01 - enable transmission.  
– 10 - enable reception.  
– 11 - enable frame buffer reception  
197  
7647F–AVR–04/09  
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