13.10 16-bit Timer/Counter Register Description
13.10.1 Timer/Counter1 Control Register A – TCCR1A
Bit
7
COM1A1
R/W
6
COM1A0
R/W
5
COM1B1
R/W
4
COM1B0
R/W
3
–
2
–
1
WGM11
R/W
0
0
WGM10
R/W
0
TCCR1A
Read/Write
Initial Value
R
0
R
0
0
0
0
0
• Bit 7:6 – COMnA1:0: Compare Output Mode for Channel A
• Bit 5:4 – COMnB1:0: Compare Output Mode for Channel B
The COMnA1:0 and COMnB1:0 control the Output Compare pins (OCnA and OCnB respec-
tively) behavior. If one or both of the COMnA1:0 bits are written to one, the OCnA output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COMnB1:0 bit are written to one, the OCnB output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OCnA or OCnB pin must be set in order to enable the output driver.
When the OCnA or OCnB is connected to the pin, the function of the COMnx1:0 bits is depen-
dent of the WGMn3:0 bits setting. Table 13-1 shows the COMnx1:0 bit functionality when the
WGMn3:0 bits are set to a Normal or a CTC mode (non-PWM).
Table 13-1. Compare Output Mode, non-PWM
COMnA1/COMnB1
COMnA0/COMnB0
Description
0
0
0
1
Normal port operation, OCnA/OCnB disconnected.
Toggle OCnA/OCnB on Compare Match.
Clear OCnA/OCnB on Compare Match (Set output to
low level).
1
1
0
1
Set OCnA/OCnB on Compare Match (Set output to
high level).
Table 13-2 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the fast
PWM mode.
Table 13-2. Compare Output Mode, Fast PWM(1)
COMnA1/COMnB1
COMnA0/COMnB0
Description
0
0
Normal port operation, OCnA/OCnB disconnected.
WGMn3:0 = 14 or 15: Toggle OC1A on Compare
Match, OC1B disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
0
1
Clear OCnA/OCnB on Compare Match, set
OCnA/OCnB at TOP
1
1
0
1
Set OCnA/OCnB on Compare Match, clear
OCnA/OCnB at TOP
Note:
1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is set. In
this case the compare match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 121. for more details.
130
ATmega16/32/64/M1/C1
7647F–AVR–04/09
ATMEL [ ATMEL ]
