• Bit 5, 2..0 - WDP3..0: Watchdog Timer Prescaler 3, 2, 1 and 0
The WDP3..0 bits determine the Watchdog Timer prescaling when the Watchdog Timer is run-
ning. The different prescaling values and their corresponding time-out periods are shown in
Table 10-2 on page 56.
Table 10-2. Watchdog Timer Prescale Select
Number of WDT Oscillator
Cycles
Typical Time-out at
VCC = 5.0V
WDP3
WDP2
WDP1
WDP0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2K (2048) cycles
4K (4096) cycles
16 ms
32 ms
64 ms
0.125 s
0.25 s
0.5 s
8K (8192) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
1024K (1048576) cycles
1.0 s
2.0 s
4.0 s
8.0 s
Reserved
56
ATmega48/88/168
2545M–AVR–09/07
ATMEL [ ATMEL ]
