ATmega8(L)
asynchronous timer should be considered undefined after wake-up in Power-save mode
if AS2 is 0.
This sleep mode basically halts all clocks except clkASY, allowing operation only of asyn-
chronous modules, including Timer/Counter 2 if clocked asynchronously.
Standby Mode
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode,
the device wakes up in 6 clock cycles.
Table 14. Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Active Clock Domains Oscillators
Wake-up Sources
SPM/
TWI
Main Clock
Timer Osc. INT1 Address Timer EEPROM
Other
Sleep
Mode
clkCPU clkFLASH clkIO clkADC clkASY Source Enabled Enabled INT0 Match
2
Ready ADC I/O
Idle
X
X
X
X
X
X
X
X(2)
X(2)
X
X
X
X
X
X
X
X
X
ADC Noise
Reduction
X(3)
X
Power
Down
X(3)
X
Power
Save
X(2)
X(2)
X(3)
X(3)
X
X
X(2)
Standby(1)
X
Notes: 1. External Crystal or resonator selected as clock source.
2. If AS2 bit in ASSR is set.
3. Only level interrupt INT1 and INT0.
Minimizing Power
Consumption
There are several issues to consider when trying to minimize the power consumption in
an AVR controlled system. In general, sleep modes should be used as much as possi-
ble, and the sleep mode should be selected so that as few as possible of the device’s
functions are operating. All functions not needed should be disabled. In particular, the
following modules may need special consideration when trying to achieve the lowest
possible power consumption.
Analog-to-Digital Converter
(ADC)
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should
be disabled before entering any sleep mode. When the ADC is turned off and on again,
the next conversion will be an extended conversion. Refer to “Analog-to-Digital Con-
verter” on page 193 for details on ADC operation.
Analog Comparator
When entering Idle mode, the Analog Comparator should be disabled if not used. When
entering ADC Noise Reduction mode, the Analog Comparator should be disabled. In the
other sleep modes, the Analog Comparator is automatically disabled. However, if the
Analog Comparator is set up to use the Internal Voltage Reference as input, the Analog
Comparator should be disabled in all sleep modes. Otherwise, the Internal Voltage Ref-
erence will be enabled, independent of sleep mode. Refer to “Analog Comparator” on
page 190 for details on how to configure the Analog Comparator.
33
2486M–AVR–12/03
ATMEL [ ATMEL ]
