ATmega8(L)
•
•
Two or more masters are performing identical communication with the same Slave.
In this case, neither the Slave nor any of the masters will know about the bus
contention.
Two or more masters are accessing the same Slave with different data or direction
bit. In this case, arbitration will occur, either in the READ/WRITE bit or in the data
bits. The masters trying to output a one on SDA while another Master outputs a zero
will lose the arbitration. Losing masters will switch to not addressed Slave mode or
wait until the bus is free and transmit a new START condition, depending on
application software action.
•
Two or more masters are accessing different slaves. In this case, arbitration will
occur in the SLA bits. Masters trying to output a one on SDA while another Master
outputs a zero will lose the arbitration. Masters losing arbitration in SLA will switch to
Slave mode to check if they are being addressed by the winning Master. If
addressed, they will switch to SR or ST mode, depending on the value of the
READ/WRITE bit. If they are not being addressed, they will switch to not addressed
Slave mode or wait until the bus is free and transmit a new START condition,
depending on application software action.
This is summarized in Figure 88. Possible status values are given in circles.
Figure 88. Possible Status Codes Caused by Arbitration
START
SLA
Data
STOP
Arbitration lost in SLA
Arbitration lost in Data
Own
No
38
TWI bus will be released and not addressed slave mode will be entered
A START condition will be transmitted when the bus becomes free
Address / General Call
received
Yes
Write
68/78
B0
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Direction
Read
Last data byte will be transmitted and NOT ACK should be received
Data byte will be transmitted and ACK should be received
189
2486M–AVR–12/03
ATMEL [ ATMEL ]
