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ATMEGA8-16AI 参数 Datasheet PDF下载

ATMEGA8-16AI图片预览
型号: ATMEGA8-16AI
PDF下载: 下载PDF文件 查看货源
内容描述: 位的AVR微控制器8K字节在 - 系统内可编程Flash [-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash]
分类和应用: 微控制器
文件页数/大小: 303 页 / 5122 K
品牌: ATMEL [ ATMEL ]
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In all sleep modes other than Idle mode, the clock system to the TWI is turned off. If the  
TWEA bit is set, the interface can still acknowledge its own slave address or the general  
call address by using the Two-wire Serial Bus clock as a clock source. The part will then  
wake up from sleep and the TWI will hold the SCL clock will low during the wake up and  
until the TWINT Flag is cleared (by writing it to one). Further data transmission will be  
carried out as normal, with the AVR clocks running as normal. Observe that if the AVR is  
set up with a long start-up time, the SCL line may be held low for a long time, blocking  
other data transmissions.  
Note that the Two-wire Serial Interface Data Register – TWDR does not reflect the last  
byte present on the bus when waking up from these sleep modes.  
Table 69. Status Codes for Slave Transmitter Mode  
Status Code  
(TWSR)  
Prescaler Bits  
are 0  
Application Software Response  
To TWCR  
Status of the Two-wire Serial Bus  
and Two-wire Serial Interface  
Hardware  
To/from TWDR  
Load data byte or  
Load data byte  
STA  
X
STO  
0
TWINT  
1
TWEA  
0
Next Action Taken by TWI Hardware  
0xA8  
0xB0  
0xB8  
0xC0  
Own SLA+R has been received;  
ACK has been returned  
Last data byte will be transmitted and NOT ACK should  
be received  
X
0
1
1
Data byte will be transmitted and ACK should be re-  
ceived  
Arbitration lost in SLA+R/W as Load data byte or  
Master; own SLA+R has been  
X
X
0
0
1
1
0
1
Last data byte will be transmitted and NOT ACK should  
be received  
Data byte will be transmitted and ACK should be re-  
ceived  
received; ACK has been returned  
Load data byte  
Data byte in TWDR has been  
transmitted; ACK has been  
received  
Load data byte or  
Load data byte  
X
X
0
0
1
1
0
1
Last data byte will be transmitted and NOT ACK should  
be received  
Data byte will be transmitted and ACK should be re-  
ceived  
Data byte in TWDR has been  
transmitted; NOT ACK has been  
received  
No TWDR action or  
No TWDR action or  
0
0
0
0
1
1
0
1
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA  
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”  
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA;  
a START condition will be transmitted when the bus  
becomes free  
No TWDR action or  
No TWDR action  
1
1
0
0
1
1
0
1
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”;  
a START condition will be transmitted when the bus  
becomes free  
0xC8  
Last data byte in TWDR has been No TWDR action or  
0
0
0
0
1
1
0
1
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA  
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”  
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA;  
a START condition will be transmitted when the bus  
becomes free  
transmitted (TWEA  
has been received  
= “0”); ACK  
No TWDR action or  
No TWDR action or  
1
1
0
0
1
1
0
1
No TWDR action  
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”;  
a START condition will be transmitted when the bus  
becomes free  
186  
ATmega8(L)  
2486M–AVR–12/03  
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