欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA8L-8MUR 参数 Datasheet PDF下载

ATMEGA8L-8MUR图片预览
型号: ATMEGA8L-8MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位爱特梅尔带有8K字节的系统内可编程闪存 [8-bit Atmel with 8KBytes In-System PRogrammable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路异步传输模式PCATM时钟
文件页数/大小: 331 页 / 6705 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第179页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第180页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第181页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第182页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第184页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第185页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第186页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第187页  
ATmega8(L)  
Figure 85. Formats and States in the Slave Transmitter Mode  
Reception of the own  
slave address and one or  
more data bytes  
S
SLA  
R
A
DATA  
A
DATA  
A
P or S  
$A8  
A
$B8  
$C0  
Arbitration lost as master  
and addressed as slave  
$B0  
Last data byte transmitted.  
Switched to not addressed  
slave (TWEA = '0')  
A
All 1's  
P or S  
$C8  
Any number of data bytes  
and their associated acknowledge bits  
From master to slave  
From slave to master  
DATA  
A
This number (contained in TWSR) corresponds  
to a defined state of the Two-Wire Serial Bus. The  
prescaler bits are zero or masked to zero  
n
Miscellaneous States  
There are two status codes that do not correspond to a defined TWI state, see Table 70.  
Status 0xF8 indicates that no relevant information is available because the TWINT Flag is not  
set. This occurs between other states, and when the TWI is not involved in a serial transfer.  
Status 0x00 indicates that a bus error has occurred during a Two-wire Serial Bus transfer. A bus  
error occurs when a START or STOP condition occurs at an illegal position in the format frame.  
Examples of such illegal positions are during the serial transfer of an address byte, a data byte,  
or an acknowledge bit. When a bus error occurs, TWINT is set. To recover from a bus error, the  
TWSTO Flag must set and TWINT must be cleared by writing a logic one to it. This causes the  
TWI to enter the not addressed Slave mode and to clear the TWSTO Flag (no other bits in  
TWCR are affected). The SDA and SCL lines are released, and no STOP condition is  
transmitted.  
Table 70. Miscellaneous States  
Status Code  
(TWSR)  
Prescaler Bits  
are 0  
Application Software Response  
To TWCR  
Status of the Two-wire Serial  
Bus and Two-wire Serial Inter-  
face Hardware  
To/from TWDR  
STA  
STO  
TWINT  
TWEA  
X
Next Action Taken by TWI Hardware  
Wait or proceed current transfer  
0xF8  
No relevant state information No TWDR action  
available; TWINT = “0”  
No TWCR action  
0x00  
Bus error due to an illegal No TWDR action  
START or STOP condition  
0
1
1
Only the internal hardware is affected, no STOP condi-  
tion is sent on the bus. In all cases, the bus is released  
and TWSTO is cleared.  
183  
2486AA–AVR–02/2013  
 复制成功!