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ATMEGA48PA-CCU 参数 Datasheet PDF下载

ATMEGA48PA-CCU图片预览
型号: ATMEGA48PA-CCU
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 20MHz, CMOS, PBGA32, 4 X 4 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, UFBGA-32]
分类和应用: 闪存微控制器
文件页数/大小: 349 页 / 2752 K
品牌: ATMEL [ ATMEL ]
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ATmega48/88/168  
The following code examples show how to do an atomic write of the TCNT1 Register  
contents. Writing any of the OCR1A/B or ICR1 Registers can be done by using the  
same principle.  
Assembly Code Example(1)  
TIM16_WriteTCNT1:  
; Save global interrupt flag  
in r18,SREG  
; Disable interrupts  
cli  
; Set TCNT1 to r17:r16  
outTCNT1H,r17  
outTCNT1L,r16  
; Restore global interrupt flag  
outSREG,r18  
ret  
C Code Example(1)  
void TIM16_WriteTCNT1( unsigned int i )  
{
unsigned char sreg;  
unsigned int i;  
/* Save global interrupt flag */  
sreg = SREG;  
/* Disable interrupts */  
_CLI();  
/* Set TCNT1 to i */  
TCNT1 = i;  
/* Restore global interrupt flag */  
SREG = sreg;  
}
Note:  
1. The example code assumes that the part specific header file is included.  
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”,  
and “SBI” instructions must be replaced with instructions that allow access to  
extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and  
“CBR”.  
The assembly code example requires that the r17:r16 register pair contains the value to  
be written to TCNT1.  
Reusing the Temporary High  
Byte Register  
If writing to more than one 16-bit register where the high byte is the same for all registers  
written, then the high byte only needs to be written once. However, note that the same  
rule of atomic operation described previously also applies in this case.  
109  
2545D–AVR–07/04  
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