Reset Register
The Reset Register is a Test Data Register used to reset the part during programming. It
is required to reset the part before entering Programming mode.
A high value in the Reset Register corresponds to pulling the external reset low. The
part is reset as long as there is a high value present in the Reset Register. Depending
on the Fuse settings for the clock options, the part will remain reset for a Reset Time-out
period (refer to “Clock Sources” on page 40) after releasing the Reset Register. The out-
put from this Data Register is not latched, so the reset will take place immediately, as
shown in Figure 132 on page 303.
Programming Enable Register The Programming Enable Register is a 16-bit register. The contents of this register is
compared to the programming enable signature, binary code
0b1010_0011_0111_0000. When the contents of the register is equal to the program-
ming enable signature, programming via the JTAG port is enabled. The register is reset
to 0 on Power-on Reset, and should always be reset when leaving Programming mode.
Figure 151. Programming Enable Register
TDI
0xA370
D
D
Q
A
T
A
Programming Enable
=
ClockDR & PROG_ENABLE
TDO
Programming Command
Register
The Programming Command Register is a 15-bit register. This register is used to seri-
ally shift in programming commands, and to serially shift out the result of the previous
command, if any. The JTAG Programming Instruction Set is shown in Table 164. The
state sequence when shifting in the programming commands is illustrated in Figure 153.
356
ATmega640/1280/1281/2560/2561
2549A–AVR–03/05
ATMEL [ ATMEL ]
