Figure 109. Formats and States in the Slave Transmitter Mode
Reception of the own
slave address and one or
more data bytes
S
SLA
R
A
DATA
A
DATA
A
P or S
$A8
A
$B8
$C0
Arbitration lost as master
and addressed as slave
$B0
Last data byte transmitted.
Switched to not addressed
slave (TWEA = '0')
A
All 1's
P or S
$C8
Any number of data bytes
and their associated acknowledge bits
From master to slave
From slave to master
DATA
A
This number (contained in TWSR) corresponds
to a defined state of the Two-Wire Serial Bus. The
prescaler bits are zero or masked to zero
n
Miscellaneous States
There are two status codes that do not correspond to a defined TWI state, see Table
120.
Status 0xF8 indicates that no relevant information is available because the TWINT Flag
is not set. This occurs between other states, and when the TWI is not involved in a serial
transfer.
Status 0x00 indicates that a bus error has occurred during a 2-wire Serial Bus transfer.
A bus error occurs when a START or STOP condition occurs at an illegal position in the
format frame. Examples of such illegal positions are during the serial transfer of an
address byte, a data byte, or an acknowledge bit. When a bus error occurs, TWINT is
set. To recover from a bus error, the TWSTO Flag must set and TWINT must be cleared
by writing a logic one to it. This causes the TWI to enter the not addressed Slave mode
and to clear the TWSTO Flag (no other bits in TWCR are affected). The SDA and SCL
lines are released, and no STOP condition is transmitted.
Table 120. Miscellaneous States
Status Code
Application Software Response
(TWSR)
Prescaler Bits
are 0
Status of the 2-wire Serial Bus
and 2-wire Serial Interface Hard-
ware
To TWCR
STO TWINT
No TWCR action
To/from TWDR
STA
0
TWEA
X
Next Action Taken by TWI Hardware
Wait or proceed current transfer
0xF8
No relevant state information No TWDR action
available; TWINT = “0”
0x00
Bus error due to an illegal No TWDR action
START or STOP condition
1
1
Only the internal hardware is affected, no STOP condi-
tion is sent on the bus. In all cases, the bus is released
and TWSTO is cleared.
268
ATmega640/1280/1281/2560/2561
2549A–AVR–03/05
ATMEL [ ATMEL ]
