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ATMEGA2560 参数 Datasheet PDF下载

ATMEGA2560图片预览
型号: ATMEGA2560
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与256K字节的系统内可编程闪存 [8- BIT Microcontroller with 256K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 407 页 / 2985 K
品牌: ATMEL [ ATMEL ]
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how waveforms are generated on the Output Compare outputs OCnx. For more details  
about advanced counting sequences and waveform generation, see “Modes of Opera-  
tion” on page 147.  
The Timer/Counter Overflow Flag (TOVn) is set according to the mode of operation  
selected by the WGMn3:0 bits. TOVn can be used for generating a CPU interrupt.  
Input Capture Unit  
The Timer/Counter incorporates an input capture unit that can capture external events  
and give them a time-stamp indicating time of occurrence. The external signal indicating  
an event, or multiple events, can be applied via the ICPn pin or alternatively, for the  
Timer/Counter1 only, via the Analog Comparator unit. The time-stamps can then be  
used to calculate frequency, duty-cycle, and other features of the signal applied. Alter-  
natively the time-stamps can be used for creating a log of the events.  
The Input Capture unit is illustrated by the block diagram shown in Figure 51. The ele-  
ments of the block diagram that are not directly a part of the input capture unit are gray  
shaded. The small “n” in register and bit names indicates the Timer/Counter number.  
Figure 51. Input Capture Unit Block Diagram  
DATA BUS (8-bit)  
TEMP (8-bit)  
ICRnH (8-bit)  
ICRnL (8-bit)  
TCNTnH (8-bit)  
TCNTnL (8-bit)  
ICRn (16-bit Register)  
TCNTn (16-bit Counter)  
WRITE  
ACO*  
ACIC*  
ICNC  
ICES  
Analog  
Comparator  
Noise  
Canceler  
Edge  
Detector  
ICFn (Int.Req.)  
ICPn  
Note:  
The Analog Comparator Output (ACO) can only trigger the Timer/Counter1 ICP – not  
Timer/Counter3, 4 or 5.  
When a change of the logic level (an event) occurs on the Input Capture Pin (ICPn),  
alternatively on the analog Comparator output (ACO), and this change confirms to the  
setting of the edge detector, a capture will be triggered. When a capture is triggered, the  
16-bit value of the counter (TCNTn) is written to the Input Capture Register (ICRn). The  
Input Capture Flag (ICFn) is set at the same system clock as the TCNTn value is copied  
into ICRn Register. If enabled (TICIEn = 1), the input capture flag generates an input  
capture interrupt. The ICFn flag is automatically cleared when the interrupt is executed.  
Alternatively the ICFn flag can be cleared by software by writing a logical one to its I/O  
bit location.  
142  
ATmega640/1280/1281/2560/2561  
2549A–AVR–03/05  
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