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ATMEGA16L-8PC 参数 Datasheet PDF下载

ATMEGA16L-8PC图片预览
型号: ATMEGA16L-8PC
PDF下载: 下载PDF文件 查看货源
内容描述: 8位AVR微控制器具有16K字节的系统内可编程闪存 [8-bit AVR Microcontroller with 16K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管异步传输模式ATM时钟
文件页数/大小: 315 页 / 2880 K
品牌: ATMEL [ ATMEL CORPORATION ]
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AVR CPU Core
Introduction
This section discusses the AVR core architecture in general. The main function of the
CPU core is to ensure correct program execution. The CPU must therefore be able to
access memories, perform calculations, control peripherals, and handle interrupts.
Figure 3.
Block Diagram of the AVR MCU Architecture
Data Bus 8-bit
Architectural Overview
Flash
Program
Memory
Program
Counter
Status
and Control
Instruction
Register
32 x 8
General
Purpose
Registrers
Interrupt
Unit
SPI
Unit
Watchdog
Timer
Indirect Addressing
Instruction
Decoder
Direct Addressing
ALU
Control Lines
Analog
Comparator
I/O Module1
Data
SRAM
I/O Module 2
I/O Module n
EEPROM
I/O Lines
In order to maximize performance and parallelism, the AVR uses a Harvard architecture
– with separate memories and buses for program and data. Instructions in the program
memory are executed with a single level pipelining. While one instruction is being exe-
cuted, the next instruction is pre-fetched from the program memory. This concept
enables instructions to be executed in every clock cycle. The program memory is In-
System Reprogrammable Flash memory.
The fast-access Register file contains 32 x 8-bit general purpose working registers with
a single clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU)
operation. In a typical ALU operation, two operands are output from the Register file, the
operation is executed, and the result is stored back in the Register file – in one clock
cycle.
Six of the 32 registers can be used as three 16-bit indirect address register pointers for
Data Space addressing – enabling efficient address calculations. One of the these
address pointers can also be used as an address pointer for look up tables in Flash Pro-
gram memory. These added function registers are the 16-bit X-, Y-, and Z-register,
described later in this section.
The ALU supports arithmetic and logic operations between registers or between a con-
stant and a register. Single register operations can also be executed in the ALU. After
6
ATmega16(L)
2466E–AVR–10/02