ATmega8U2/16U2/32U2
26.4.3
External Clock Drive
Table 26-2. External Clock Drive
V
Min.
0
CC=2.7-5.5V
VCC=4.5-5.5V
Min. Max.
Symbol
1/tCLCL
tCLCL
Parameter
Oscillator Frequency
Clock Period
High Time
Max.
Units
MHz
ns
8
0
62.5
25
16
125
50
tCHCX
tCLCX
tCLCH
tCHCL
ns
Low Time
50
25
ns
Rise Time
1.6
1.6
0.5
0.5
s
Fall Time
s
Change in period from
one clock cycle to the
next
tCLCL
2
2
%
Note:
All DC Characteristics contained in this datasheet are based on simulation and characterization of
other AVR microcontrollers manufactured in the same process technology. These values are pre-
liminary values representing design targets, and will be updated after characterization of actual
silicon.
26.5 System and Reset Characteristics
Table 26-3. Reset, Brown-out and Internal Voltage Reference Characteristics
Symbol
Parameter
Condition
Min
Typ
1.4
1.3
Max
2.3
2.3
0.1
Units
V
Power-on Reset Threshold Voltage (rising)
Power-on Reset Threshold Voltage (falling)(Note:)
VCC Start Voltage to ensure internal Power-on Reset signal
VCC Rise Rate to ensure internal Power_on Reset signal
Minimum pulse width on RESET Pin
VPOT
V
VPOR
VCCRR
tRST
-0.1
0.3
V
V/ms
ns
5V, 25°C
400
50
VHYST
tBOD
Brown-out Detector Hysteresis
mV
ns
Min Pulse Width on Brown-out Reset
VCC = 2.7V -
5.5V
VBG
Bandgap reference voltage
1.0
1.1
1.2
70
V
tBG
IBG
Bandgap reference start-up time
-
-
40
10
μs
Bandgap reference current consumption
μA
Note:
The POR will not work unless the supply voltage has been below VPOT (falling)
267
7799D–AVR–11/10
ATMEL [ ATMEL ]
