ATmega169P
Table 24-7. ATmega169P Boundary-scan Order (Continued)
Bit Number
96
Signal Name
EXTCLK (XTAL1)
OSCCK
Module
95
Clock input and Oscillators for the main clock
(Observe-only)
94
RCCK
93
OSC32CK
92
PD0.Data
91
PD0.Control
90
PD0.Pull-up_Enable
PD1.Data
89
88
PD1.Control
87
PD1.Pull-up_Enable
PD2.Data
86
85
PD2.Control
84
PD2.Pull-up_Enable
PD3.Data
83
82
PD3.Control
81
PD3.Pull-up_Enable
PD4.Data
Port D
80
79
PD4.Control
78
PD4.Pull-up_Enable
PD5.Data
77
76
PD5.Control
75
PD5.Pull-up_Enable
PD6.Data
74
73
PD6.Control
72
PD6.Pull-up_Enable
PD7.Data
71
70
PD7.Control
69
PD7.Pull-up_Enable
PG0.Data
68
67
PG0.Control
PG0.Pull-up_Enable
PG1.Data
66
Port G
Port C
65
64
PG1.Control
PG1.Pull-up_Enable
PC0.Data
63
62
61
PC0.Control
275
8018A–AVR–03/06
ATMEL [ ATMEL ]
