欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA169PV 参数 Datasheet PDF下载

ATMEGA169PV图片预览
型号: ATMEGA169PV
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有16K字节的系统内可编程闪存 [Microcontroller with 16K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 390 页 / 3485 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA169PV的Datasheet PDF文件第23页浏览型号ATMEGA169PV的Datasheet PDF文件第24页浏览型号ATMEGA169PV的Datasheet PDF文件第25页浏览型号ATMEGA169PV的Datasheet PDF文件第26页浏览型号ATMEGA169PV的Datasheet PDF文件第28页浏览型号ATMEGA169PV的Datasheet PDF文件第29页浏览型号ATMEGA169PV的Datasheet PDF文件第30页浏览型号ATMEGA169PV的Datasheet PDF文件第31页  
ATmega169P  
the selected address. If EEMWE is zero, setting EEWE will have no effect. When EEMWE has  
been written to one by software, hardware clears the bit to zero after four clock cycles. See the  
description of the EEWE bit for an EEPROM write procedure.  
• Bit 1 – EEWE: EEPROM Write Enable  
The EEPROM Write Enable Signal EEWE is the write strobe to the EEPROM. When address  
and data are correctly set up, the EEWE bit must be written to one to write the value into the  
EEPROM. The EEMWE bit must be written to one before a logical one is written to EEWE, oth-  
erwise no EEPROM write takes place.  
• Bit 0 – EERE: EEPROM Read Enable  
The EEPROM Read Enable Signal EERE is the read strobe to the EEPROM. When the correct  
address is set up in the EEAR Register, the EERE bit must be written to a logic one to trigger the  
EEPROM read. The EEPROM read access takes one instruction, and the requested data is  
available immediately. When the EEPROM is read, the CPU is halted for four cycles before the  
next instruction is executed.  
27  
8018A–AVR–03/06  
 复制成功!