ATmega16(L)
Special Function I/O
Register – SFIOR
Bit
7
ADTS2
Read/Write
Initial Value
R/W
0
6
ADTS1
R/W
0
5
ADTS0
R/W
0
4
–
R
0
3
ACME
R/W
0
2
PUD
R/W
0
1
PSR2
R/W
0
0
PSR10
R/W
0
SFIOR
• Bit 2 – PUD: Pull-up disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
for more details about this feature.
Alternate Functions of
Port A
Port A has an alternate function as analog input for the ADC as shown in
If some Port
A pins are configured as outputs, it is essential that these do not switch when a conversion is in
progress. This might corrupt the result of the conversion.
Table 22.
Port A Pins Alternate Functions
Port Pin
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Alternate Function
ADC7 (ADC input channel 7)
ADC6 (ADC input channel 6)
ADC5 (ADC input channel 5)
ADC4 (ADC input channel 4)
ADC3 (ADC input channel 3)
ADC2 (ADC input channel 2)
ADC1 (ADC input channel 1)
ADC0 (ADC input channel 0)
and
relate the alternate functions of Port A to the overriding signals shown in
Table 23.
Overriding Signals for Alternate Functions in PA7..PA4
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
PA7/ADC7
0
0
0
0
0
0
0
0
–
ADC7 INPUT
PA6/ADC6
0
0
0
0
0
0
0
0
–
ADC6 INPUT
PA5/ADC5
0
0
0
0
0
0
0
0
–
ADC5 INPUT
PA4/ADC4
0
0
0
0
0
0
0
0
–
ADC4 INPUT
57
2466S–AVR–05/09
ATMEL [ ATMEL CORPORATION ]
