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ATMEGA128L-8AL 参数 Datasheet PDF下载

ATMEGA128L-8AL图片预览
型号: ATMEGA128L-8AL
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, 8MHz, CMOS, PQFP64, 14 X 14 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026AEB, TQFP-64]
分类和应用: 时钟微控制器外围集成电路
文件页数/大小: 391 页 / 6192 K
品牌: ATMEL [ ATMEL ]
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ATmega128(L)  
The next code examples show assembly and C functions for reading the EEPROM. The exam-  
ples assume that interrupts are controlled so that no interrupts will occur during execution of  
these functions.  
Assembly Code Example  
EEPROM_read:  
; Wait for completion of previous write  
sbic EECR,EEWE  
rjmp EEPROM_read  
; Set up address (r18:r17) in address register  
out EEARH, r18  
out EEARL, r17  
; Start eeprom read by writing EERE  
sbi EECR,EERE  
; Read data from data register  
in r16,EEDR  
ret  
C Code Example  
unsigned char EEPROM_read(unsigned int uiAddress)  
{
/* Wait for completion of previous write */  
while(EECR & (1<<EEWE))  
;
/* Set up address register */  
EEAR = uiAddress;  
/* Start eeprom read by writing EERE */  
EECR |= (1<<EERE);  
/* Return data from data register */  
return EEDR;  
}
EEPROM Write During When entering Power-down sleep mode while an EEPROM write operation is active, the  
Power-down Sleep  
Mode  
EEPROM write operation will continue, and will complete before the write access time has  
passed. However, when the write operation is completed, the Oscillator continues running, and  
as a consequence, the device does not enter Power-down entirely. It is therefore recommended  
to verify that the EEPROM write operation is completed before entering Power-down.  
Preventing EEPROM  
Corruption  
During periods of low VCC, the EEPROM data can be corrupted because the supply voltage is  
too low for the CPU and the EEPROM to operate properly. These issues are the same as for  
board level systems using EEPROM, and the same design solutions should be applied.  
An EEPROM data corruption can be caused by two situations when the voltage is too low. First,  
a regular write sequence to the EEPROM requires a minimum voltage to operate correctly. Sec-  
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage is too low.  
EEPROM data corruption can easily be avoided by following this design recommendation:  
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This can  
be done by enabling the internal Brown-out Detector (BOD). If the detection level of the internal  
BOD does not match the needed detection level, an external low VCC Reset Protection circuit  
25  
2467P–AVR–08/07  
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