ATmega128(L)
Compare Match
Output Unit
The Compare Output mode (COMnx1:0) bits have two functions. The waveform generator uses
the COMnx1:0 bits for defining the output compare (OCnx) state at the next compare match.
Secondly the COMnx1:0 bits control the OCnx pin output source. Figure 50 shows a simplified
schematic of the logic affected by the COMnx1:0 bit setting. The I/O registers, I/O bits, and I/O
pins in the figure are shown in bold. Only the parts of the general I/O port control registers (DDR
and PORT) that are affected by the COMnx1:0 bits are shown. When referring to the OCnx
state, the reference is for the internal OCnx Register, not the OCnx pin. If a system Reset occur,
the OCnx Register is reset to “0”.
Figure 50. Compare Match Output Unit, Schematic
COMnx1
Waveform
Generator
COMnx0
FOCnx
D
Q
1
0
OCnx
Pin
OCnx
D
Q
PORT
D
Q
DDR
clkI/O
The general I/O port function is overridden by the output compare (OCnx) from the Waveform
Generator if either of the COMnx1:0 bits are set. However, the OCnx pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The data direction
register bit for the OCnx pin (DDR_OCnx) must be set as output before the OCnx value is visible
on the pin. The port override function is generally independent of the waveform generation
mode, but there are some exceptions. Refer to Table 58, Table 59 and Table 60 for details.
The design of the output compare pin logic allows initialization of the OCnx state before the out-
put is enabled. Note that some COMnx1:0 bit settings are reserved for certain modes of
operation. See “16-bit Timer/Counter Register Description” on page 133.
The COMnx1:0 bits have no effect on the Input Capture unit.
Compare Output Mode The waveform generator uses the COMnx1:0 bits differently in normal, CTC, and PWM modes.
and Waveform
Generation
For all modes, setting the COMnx1:0 = 0 tells the waveform generator that no action on the
OCnx Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to Table 58 on page 133. For fast PWM mode refer to Table 59 on page
134, and for phase correct and phase and frequency correct PWM refer to Table 60 on page
134.
A change of the COMnx1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOCnx strobe bits.
123
2467P–AVR–08/07
ATMEL [ ATMEL ]
