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ATMEGA128L-8AL 参数 Datasheet PDF下载

ATMEGA128L-8AL图片预览
型号: ATMEGA128L-8AL
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, 8MHz, CMOS, PQFP64, 14 X 14 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026AEB, TQFP-64]
分类和应用: 时钟微控制器外围集成电路
文件页数/大小: 391 页 / 6192 K
品牌: ATMEL [ ATMEL ]
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ATmega128(L)  
Figure 46. 16-bit Timer/Counter Block Diagram  
Count  
TOVx  
(Int.Req.)  
Clear  
Control Logic  
Direction  
Clock Select  
TCLK  
Edge  
Detector  
Tx  
TOP BOTTOM  
( From Prescaler )  
Timer/Counter  
TCNTx  
=
= 0  
OCFxA  
(Int.Req.)  
Waveform  
Generation  
OCxA  
OCxB  
OCxC  
=
OCRxA  
OCFxB  
(Int.Req.)  
Fixed  
TOP  
Values  
Waveform  
Generation  
=
OCRxB  
OCFxC  
(Int.Req.)  
Waveform  
Generation  
=
OCRxC  
( From Analog  
Comparator Ouput )  
ICFx (Int.Req.)  
Edge  
Detector  
Noise  
Canceler  
ICRx  
ICPx  
TCCRxA  
TCCRxB  
TCCRxC  
Note:  
Refer to Figure 1 on page 2, Table 30 on page 74, and Table 39 on page 81 for Timer/Counter1  
and 3 pin placement and description.  
Registers  
The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B/C), and Input Capture Reg-  
ister (ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-  
bit registers. These procedures are described in the section “Accessing 16-bit Registers” on  
page 115. The Timer/Counter Control Registers (TCCRnA/B/C) are 8-bit registers and have no  
CPU access restrictions. Interrupt requests (shorten as Int.Req.) signals are all visible in the  
Timer Interrupt Flag Register (TIFR) and Extended Timer Interrupt Flag Register (ETIFR). All  
interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK) and Extended  
Timer Interrupt Mask Register (ETIMSK). (E)TIFR and (E)TIMSK are not shown in the figure  
since these registers are shared by other timer units.  
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on  
the Tn pin. The Clock Select logic block controls which clock source and edge the Timer/Counter  
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source  
is selected. The output from the clock select logic is referred to as the timer clock (clk ).  
n
T
The double buffered Output Compare Registers (OCRnA/B/C) are compared with the  
Timer/Counter value at all time. The result of the compare can be used by the waveform gener-  
ator to generate a PWM or variable frequency output on the Output Compare Pin (OCnA/B/C).  
113  
2467P–AVR–08/07  
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