Timer/Counter Prescaler Figure 45. Prescaler for Timer/Counter0
clkI/O
clkT0S
10-BIT T/C PRESCALER
Clear
TOSC1
AS0
PSR0
0
CS00
CS01
CS02
TIMER/COUNTER0 CLOCK SOURCE
clkT0
The clock source for Timer/Counter0 is named clkT0. clkT0 is by default connected to the
main system clock clkI/O. By setting the AS0 bit in ASSR, Timer/Counter0 is asynchro-
nously clocked from the TOSC1 pin. This enables use of Timer/Counter0 as a Real
Time Counter (RTC). When AS0 is set, pins TOSC1 and TOSC2 are disconnected from
Port C. A crystal can then be connected between the TOSC1 and TOSC2 pins to serve
as an independent clock source for Timer/Counter0. The Oscillator is optimized for use
with a 32.768 kHz crystal. Applying an external clock source to TOSC1 is not
recommended.
For Timer/Counter0, the possible prescaled selections are: clkT0S/8, clkT0S/32, clkT0S/64,
clkT0S/128, clkT0S/256, and clkT0S/1024. Additionally, clkT0S as well as 0 (stop) may be
selected. Setting the PSR0 bit in SFIOR resets the prescaler. This allows the user to
operate with a predictable prescaler.
Special Function IO Register –
SFIOR
Bit
7
6
–
5
–
4
–
3
ACME
R/W
0
2
1
PSR0
R/W
0
0
PSR321
R/W
0
TSM
R/W
0
PUD
R/W
0
SFIOR
Read/Write
Initial Value
R
0
R
0
R
0
• Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this
mode, the value that is written to the PSR0 and PSR321 bits is kept, hence keeping the
corresponding prescaler reset signals asserted. This ensures that the corresponding
Timer/Counters are halted and can be configured to the same value without the risk of
one of them advancing during configuration. When the TSM bit is written to zero, the
PSR0 and PSR321 bits are cleared by hardware, and the Timer/Counters start counting
simultaneously.
• Bit 1 – PSR0: Prescaler Reset Timer/Counter0
110
ATmega128(L)
2467P–AVR–08/07
ATMEL [ ATMEL ]
