ATmega640/1280/1281/2560/2561
Control corresponds to the Data Direction - DD Register, and the Pull-up Enable - PUExn - cor-
responds to logic expression PUD · DDxn · PORTxn.
Digital alternate port functions are connected outside the dotted box in Figure 28-3 to make the
scan chain read the actual pin value. For analog function, there is a direct connection from the
external pin to the analog circuit. There is no scan chain on the interface between the digital and
the analog circuitry, but some digital control signal to analog circuitry are turned off to avoid driv-
ing contention on the pads.
When JTAG IR contains EXTEST or SAMPLE_PRELOAD the clock is not sent out on the port
pins even if the CKOUT fuse is programmed. Even though the clock is output when the JTAG IR
contains SAMPLE_PRELOAD, the clock is not sampled by the boundary scan.
Figure 28-2. Boundary-scan Cell for Bi-directional Port Pin with Pull-up Function.
To Next Cell
ShiftDR
EXTEST
Vcc
Pull-up Enable (PUE)
0
1
Output Control (OC)
FF1
Q
LD1
0
1
0
1
D
D
Q
G
Output Data (OD)
0
1
FF0
Q
LD0
0
1
0
1
D
D
G
Q
Input Data (ID)
From Last Cell
ClockDR
UpdateDR
307
2549L–AVR–08/07
ATMEL [ ATMEL ]
