28.3.1
28.3.2
Bypass Register
The Bypass Register consists of a single Shift Register stage. When the Bypass Register is
selected as path between TDI and TDO, the register is reset to 0 when leaving the Capture-DR
controller state. The Bypass Register can be used to shorten the scan chain on a system when
the other devices are to be tested.
Device Identification Register
Figure 3 shows the structure of the Device Identification Register.
Figure 3. The Format of the Device Identification Register
LSB
MSB
Bit
31
28
27
12
11
1
0
Device ID
Version
Part Number
Manufacturer ID
1
4 bits
16 bits
11 bits
1-bit
28.3.2.1
28.3.2.2
28.3.2.3
28.3.3
Version
Version is a 4-bit number identifying the revision of the component. The JTAG version number
follows the revision of the device. Revision A is 0x0, revision B is 0x1 and so on.
Part Number
The part number is a 16-bit code identifying the component. The JTAG Part Number for
ATmega640/1280/1281/2560/2561 is listed in Table 30-6 on page 340.
Manufacturer ID
The Manufacturer ID is a 11-bit code identifying the manufacturer. The JTAG manufacturer ID
for ATMEL is listed in Table 30-6 on page 340.
Reset Register
The Reset Register is a test Data Register used to reset the part. Since the AVR tri-states Port
Pins when reset, the Reset Register can also replace the function of the unimplemented optional
JTAG instruction HIGHZ.
A high value in the Reset Register corresponds to pulling the external Reset low. The part is
reset as long as there is a high value present in the Reset Register. Depending on the fuse set-
tings for the clock options, the part will remain reset for a reset time-out period (see “Clock
Sources” on page 40) after releasing the Reset Register. The output from this Data Register is
not latched, so the reset will take place immediately, as shown in Figure 28-1.
304
ATmega640/1280/1281/2560/2561
2549L–AVR–08/07
ATMEL [ ATMEL ]
