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ATMEGA2560-16AU-SL383 参数 Datasheet PDF下载

ATMEGA2560-16AU-SL383图片预览
型号: ATMEGA2560-16AU-SL383
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, MS-026AED, TQFP-100]
分类和应用: 时钟微控制器
文件页数/大小: 448 页 / 7518 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA2560-16AU-SL383的Datasheet PDF文件第128页浏览型号ATMEGA2560-16AU-SL383的Datasheet PDF文件第129页浏览型号ATMEGA2560-16AU-SL383的Datasheet PDF文件第130页浏览型号ATMEGA2560-16AU-SL383的Datasheet PDF文件第131页浏览型号ATMEGA2560-16AU-SL383的Datasheet PDF文件第133页浏览型号ATMEGA2560-16AU-SL383的Datasheet PDF文件第134页浏览型号ATMEGA2560-16AU-SL383的Datasheet PDF文件第135页浏览型号ATMEGA2560-16AU-SL383的Datasheet PDF文件第136页  
16.9.2  
TCCR0B – Timer/Counter Control Register B  
Bit  
7
FOC0A  
W
6
FOC0B  
W
5
4
3
WGM02  
R/W  
0
2
CS02  
R/W  
0
1
CS01  
R/W  
0
0
CS00  
R/W  
0
TCCR0B  
0x25 (0x45)  
Read/Write  
Initial Value  
R
0
R
0
0
0
• Bit 7 – FOC0A: Force Output Compare A  
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.  
However, for ensuring compatibility with future devices, this bit must be set to zero when  
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,  
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is  
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a  
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the  
forced compare.  
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using  
OCR0A as TOP.  
The FOC0A bit is always read as zero.  
• Bit 6 – FOC0B: Force Output Compare B  
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.  
However, for ensuring compatibility with future devices, this bit must be set to zero when  
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit,  
an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is  
changed according to its COM0B1:0 bits setting. Note that the FOC0B bit is implemented as a  
strobe. Therefore it is the value present in the COM0B1:0 bits that determines the effect of the  
forced compare.  
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using  
OCR0B as TOP.  
The FOC0B bit is always read as zero.  
• Bits 5:4 – Res: Reserved Bits  
These bits are reserved bits and will always read as zero.  
• Bit 3 – WGM02: Waveform Generation Mode  
See the description in the “TCCR0A – Timer/Counter Control Register A” on page 129.  
• Bits 2:0 – CS02:0: Clock Select  
The three Clock Select bits select the clock source to be used by the Timer/Counter, see Table  
16-9 on page 133.  
132  
ATmega640/1280/1281/2560/2561  
2549L–AVR–08/07  
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