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AT90PWM3B-16SU 参数 Datasheet PDF下载

AT90PWM3B-16SU图片预览
型号: AT90PWM3B-16SU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有8K字节的系统内可编程闪存 [8-bit Microcontroller with 8K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 361 页 / 6022 K
品牌: ATMEL [ ATMEL ]
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AT90PWM2/3/2B/3B  
count  
Increment or decrement TCNT0 by 1.  
direction Select between increment and decrement.  
clear  
clkTn  
top  
Clear TCNT0 (set all bits to zero).  
Timer/Counter clock, referred to as clkT0 in the following.  
Signalize that TCNT0 has reached maximum value.  
Signalize that TCNT0 has reached minimum value (zero).  
bottom  
Depending of the mode of operation used, the counter is cleared, incremented, or decremented  
at each timer clock (clkT0). clkT0 can be generated from an external or internal clock source,  
selected by the Clock Select bits (CS02:0). When no clock source is selected (CS02:0 = 0) the  
timer is stopped. However, the TCNT0 value can be accessed by the CPU, regardless of  
whether clkT0 is present or not. A CPU write overrides (has priority over) all counter clear or  
count operations.  
The counting sequence is determined by the setting of the WGM01 and WGM00 bits located in  
the Timer/Counter Control Register (TCCR0A) and the WGM02 bit located in the Timer/Counter  
Control Register B (TCCR0B). There are close connections between how the counter behaves  
(counts) and how waveforms are generated on the Output Compare outputs OC0A and OC0B.  
For more details about advanced counting sequences and waveform generation, see “Modes of  
Operation” on page 90.  
The Timer/Counter Overflow Flag (TOV0) is set according to the mode of operation selected by  
the WGM02:0 bits. TOV0 can be used for generating a CPU interrupt.  
14.4 Output Compare Unit  
The 8-bit comparator continuously compares TCNT0 with the Output Compare Registers  
(OCR0A and OCR0B). Whenever TCNT0 equals OCR0A or OCR0B, the comparator signals a  
match. A match will set the Output Compare Flag (OCF0A or OCF0B) at the next timer clock  
cycle. If the corresponding interrupt is enabled, the Output Compare Flag generates an Output  
Compare interrupt. The Output Compare Flag is automatically cleared when the interrupt is exe-  
cuted. Alternatively, the flag can be cleared by software by writing a logical one to its I/O bit  
location. The Waveform Generator uses the match signal to generate an output according to  
operating mode set by the WGM02:0 bits and Compare Output mode (COM0x1:0) bits. The max  
and bottom signals are used by the Waveform Generator for handling the special cases of the  
extreme values in some modes of operation (“Modes of Operation” on page 90).  
Figure 14-3 shows a block diagram of the Output Compare unit.  
87  
4317J–AVR–08/10  
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