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AT89S53-24JC 参数 Datasheet PDF下载

AT89S53-24JC图片预览
型号: AT89S53-24JC
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有12K字节的闪存 [8-Bit Microcontroller with 12K Bytes Flash]
分类和应用: 闪存微控制器
文件页数/大小: 32 页 / 474 K
品牌: ATMEL [ ATMEL ]
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4. Any memory location can be verified by using the Read  
instruction which returns the content at the selected  
address at serial output MISO/P1.6.  
Serial Programming Algorithm  
To program and verify the AT89S53 in the serial program-  
ming mode, the following sequence is recommended:  
5. At the end of a programming session, RST can be set  
low to commence normal operation.  
1. Power-up sequence:  
Apply power between VCC and GND pins.  
Set RST pin to “H”.  
Power-off sequence (if needed):  
Set XTAL1 to “L” (if a crystal is not used).  
Set RST to “L”.  
If a crystal is not connected across pins XTAL1 and  
XTAL2, apply a 3 MHz to 24 MHz clock to XTAL1 pin  
and wait for at least 10 milliseconds.  
Tur n VCC power off.  
2. Enable serial programming by sending the Program-  
ming Enable serial instruction to pin MOSI/P1.5. The  
frequency of the shift clock supplied at pin SCK/P1.7  
needs to be less than the CPU clock at XTAL1 divided  
by 40.  
Serial Programming Instruction  
The Instruction Set for Serial Programming follows a 3-byte  
protocol and is shown in the following table:  
3. The Code array is programmed one byte at a time by  
supplying the address and data together with the  
appropriate Write instruction. The selected memory  
location is first automatically erased before new data is  
written. The write cycle is self-timed and typically takes  
less than 2.5 ms at 5V.  
Instruction Set  
Instruction  
Input Format  
Byte 2  
Operation  
Byte 1  
Byte 3  
Programming Enable  
Chip Erase  
1010 1100  
1010 1100  
0101 0011  
xxxx x100  
low addr  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
Enable serial programming interface after RST goes high.  
Chip erase the 12K memory array.  
Read Code Memory  
Read data from Code memory array at the selected address.  
The 6 MSBs of the first byte are the high order address bits.  
The low order address bits are in the second byte. Data are  
available at pin MISO during the third byte.  
01  
Write Code Memory  
Write Lock Bits  
low addr  
x x111  
data in  
Write data to Code memory location at selected address. The  
address bits are the 6 MSBs of the first byte together with the  
second byte.  
10  
1010 1100  
xxxx xxxx  
Write lock bits.  
Set LB1, LB2 or LB3 = “0” to program lock bits.  
Notes: 1. DATA polling is used to indicate the end of a write cycle which typically takes less than 2.5 ms at 5V.  
2. “x” = don’t care.  
AT89S53  
4-236  
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