AT89S53
Flash Parallel Programming Modes
Data I/O
Address
Mode
RST
H
PSEN
ALE/PROG
EA/V
P2.6
P2.7
P3.6
P3.7
P0.7:0
P2.5:0 P1.7:0
PP
(1)
(1)
Serial Prog. Modes
Chip Erase
h
h
x
(2)
H
L
L
L
L
12V
H
L
L
H
L
L
H
H
H
L
H
H
L
X
X
Write (12K bytes) Memory
Read (12K bytes) Memory
Write Lock Bits:
H
12V
12V
12V
DIN
ADDR
H
H
L
DOUT
DIN
ADDR
H
H
L
X
X
Bit - 1
Bit - 2
Bit - 3
P0.7 = 0
P0.6 = 0
P0.5 = 0
DOUT
@P0.2
@P0.1
@P0.0
DOUT
DOUT
P0.0 = 0
P0.0 = 1
@P0.0
X
X
Read Lock Bits:
H
L
H
H
12V
H
H
L
L
X
Bit - 1
Bit - 2
Bit - 3
X
X
X
Read Atmel Code
H
H
H
H
H
L
L
L
L
L
12V
12V
12V
12V
12V
L
L
L
L
H
L
L
L
L
L
L
L
L
L
30H
31H
X
Read Device Code
Serial Prog. Enable
Serial Prog. Disable
Read Serial Prog. Fuse
H
(2)
H
H
H
H
H
H
(2)
X
H
X
Notes: 1. “h” = weakly pulled “High” internally.
2. Chip Erase and Serial Programming Fuse require a 10-ms PROG pulse. Chip Erase needs to be performed first before
reprogramming any byte with a content other than FFH.
3. P3.4 is pulled Low during programming to indicate RDY/BSY.
4. “X” = don’t care
4-237
ATMEL [ ATMEL ]
