Reading the Signature Bytes: The signature bytes are
read by the same procedure as a normal verification of
locations 030H and 031H, except that P3.6 and P3.7 must
be pulled to a logic low. The values returned are as follows:
be less than 1/40 of the crystal frequency. With a 24 MHz
oscillator clock, the maximum SCK frequency is 600 kHz.
Serial Programming Algorithm
To program and verify the AT89S53 in the serial program-
ming mode, the following sequence is recommended:
(030H) = 1EH indicates manufactured by Atmel
(031H) = 53H indicates 89S53
1. Power-up sequence:
Programming Interface
Apply power between VCC and GND pins.
Set RST pin to “H”.
Every code byte in the Flash array can be written, and the
entire array can be erased, by using the appropriate combi-
nation of control signals. The write operation cycle is self-
timed and once initiated, will automatically time itself to
completion.
If a crystal is not connected across pins XTAL1 and
XTAL2, apply a 3 MHz to 24 MHz clock to XTAL1 pin
and wait for at least 10 milliseconds.
2. Enable serial programming by sending the Pro-
gramming Enable serial instruction to pin
MOSI/P1.5. The frequency of the shift clock sup-
plied at pin SCK/P1.7 needs to be less than the
CPU clock at XTAL1 divided by 40.
All major programming vendors offer worldwide support for
the Atmel microcontroller series. Please contact your local
programming vendor for the appropriate software revision.
3. The Code array is programmed one byte at a time
by supplying the address and data together with the
appropriate Write instruction. The selected memory
location is first automatically erased before new
data is written. The write cycle is self-timed and typ-
ically takes less than 2.5 ms at 5V.
Serial Downloading
The Code memory array can be programmed using the
serial SPI bus while RST is pulled to VCC. The serial inter-
face consists of pins SCK, MOSI (input) and MISO (output).
After RST is set high, the Programming Enable instruction
needs to be executed first before program/erase operations
can be executed.
4. Any memory location can be verified by using the
Read instruction which returns the content at the
selected address at serial output MISO/P1.6.
An auto-erase cycle is built into the self-timed programming
operation (in the serial mode ONLY) and there is no need
to first execute the Chip Erase instruction unless any of the
lock bits have been programmed. The Chip Erase opera-
tion turns the content of every memory location in the Code
array into FFH.
5. At the end of a programming session, RST can be
set low to commence normal operation.
Power-off sequence (if needed):
Set XTAL1 to “L” (if a crystal is not used).
Set RST to “L”.
The Code memory array has an address space of 0000H to
2FFFH.
Turn VCC power off.
Either an external system clock is supplied at pin XTAL1 or
a crystal needs to be connected across pins XTAL1 and
XTAL2. The maximum serial clock (SCK) frequency should
Serial Programming Instruction
The Instruction Set for Serial Programming follows a 3 byte
protocol and is shown in the following table.
AT89S53
20
ATMEL [ ATMEL ]
