AT89S53
Instruction Set
Input Format
Instruction
Byte 1
Byte 2
Byte 3
Operation
Programming Enable 1010 1100 0101 0011 xxxx xxxx Enable serial programming interface after RST goes
high.
Chip Erase
1010 1100 xxxx x100 xxxx xxxx Chip erase the 12K memory array.
01
Read Code Memory
low addr
xxxx xxxx Read data from Code memory array at the selected
address. The 6 MSBs of the first byte are the high order
address bits. The low order address bits are in the
second byte. Data are available at pin MISO during the
third byte.
Write Code Memory
Write Lock Bits
10 low addr
data in
Write data to Code memory location at selected
address. The address bits are the 6 MSBs of the first
byte together with the second byte.
x x111
1010 1100
xxxx xxxx Write lock bits.
Set LB1, LB2 or LB3 = “0” to program lock bits.
Notes: 1. DATA polling is used to indicate the end of a write cycle which typically takes less than 10 ms at 2.7V.
2. “x” = don’t care.
.
Flash Parallel Programming Modes
Data I/O
Address
Mode
RST
H
PSEN
ALE/PROG
EA/VPP
x
P2.6
P2.7
P3.6
P3.7
P0.7:0
P2.5:0 P1.7:0
Serial Prog. Modes
Chip Erase
h(1)
h(1)
(2)
H
L
12V
12V
12V
12V
H
L
L
H
L
L
H
H
H
L
H
H
L
X
X
Write (12K bytes) Memory
Read (12K bytes) Memory
Write Lock Bits:
H
L
DIN
ADDR
H
L
H
L
DOUT
DIN
ADDR
H
L
H
L
X
X
Bit - 1
Bit - 2
Bit - 3
P0.7 = 0
P0.6 = 0
P0.5 = 0
DOUT
@P0.2
@P0.1
@P0.0
DOUT
DOUT
P0.0 = 0
P0.0 = 1
@P0.0
X
X
Read Lock Bits:
H
L
H
H
12V
H
H
L
L
X
Bit - 1
Bit - 2
Bit - 3
X
X
X
Read Atmel Code
H
H
H
H
H
L
L
L
L
L
12V
12V
12V
12V
12V
L
L
L
L
H
L
L
L
L
L
L
L
L
L
30H
31H
X
Read Device Code
Serial Prog. Enable
Serial Prog. Disable
Read Serial Prog. Fuse
H
(2)
H
H
H
H
H
H
(2)
X
H
X
Notes: 1. “h” = weakly pulled “High” internally.
2. Chip Erase and Serial Programming Fuse require a 10 ms PROG pulse. Chip Erase needs to be performed first before
reprogramming any byte with a content other than FFH.
3. P3.4 is pulled Low during programming to indicate RDY/BSY.
4. “X” = don’t care
21
ATMEL [ ATMEL ]
