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AT45DB321D-SU-SL955 参数 Datasheet PDF下载

AT45DB321D-SU-SL955图片预览
型号: AT45DB321D-SU-SL955
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆位2.7伏的DataFlash [32-megabit 2.7-volt DataFlash]
分类和应用:
文件页数/大小: 57 页 / 1838 K
品牌: ATMEL [ ATMEL ]
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AT45DB321D  
13. “Power of 2” Binary Page Size Option  
“Power of 2” binary page size Configuration Register is a user-programmable nonvolatile regis-  
ter that allows the page size of the main memory to be configured for binary page size  
(512 bytes) or DataFlash standard page size (528 bytes). The “power of 2” page size is a one-  
time programmable configuration register and once the device is configured for “power  
of 2” page size, it cannot be reconfigured again. The devices are initially shipped with the  
page size set to 528 bytes. The user has the option of ordering binary page size (512  
bytes) devices from the factory. For details, please refer to Section 26. ”Ordering Information” on  
page 48.  
For the binary “power of 2” page size to become effective, the following steps must be followed:  
1. Program the one-time programmable configuration resister using opcode sequence  
3DH, 2AH, 80H and A6H (please see Section 13.1).  
2. Power cycle the device (i.e. power down and power up again).  
3. The page for the binary page size can now be programmed.  
If the above steps are not followed to set the page size prior to page programming, incorrect  
data during a read operation may be encountered.  
13.1 Programming the Configuration Register  
To program the Configuration Register for “power of 2” binary page size, the CS pin must first be  
asserted as it would be with any other command. Once the CS pin has been asserted, the  
appropriate 4-byte opcode sequence must be clocked into the device in the correct order. The  
4-byte opcode sequence must start with 3DH and be followed by 2AH, 80H, and A6H. After the  
last bit of the opcode sequence has been clocked in, the CS pin must be deasserted to initiate  
the internally self-timed program cycle. The programming of the Configuration Register should  
take place in a time of tP, during which time the Status Register will indicate that the device is  
busy. The device must be power cycled after the completion of the program cycle to set the  
“power of 2” page size. If the device is powered-down before the completion of the program  
cycle, then setting the Configuration Register cannot be guaranteed. However, the user should  
check bit 0 of the status register to see whether the page size was configured for binary page  
size. If not, the command can be re-issued again.  
Command  
Byte 1  
Byte 2  
Byte 3  
Byte 4  
Power of Two Page Size  
3DH  
2AH  
80H  
A6H  
Figure 13-1. Erase Sector Protection Register  
CS  
Opcode  
Byte 1  
Opcode  
Byte 2  
Opcode  
Byte 3  
Opcode  
Byte 4  
SI  
Each transition  
represents 8 bits  
25  
3597N–DFLASH–04/09