AT45DB161D
Table 18-4.
AC Characteristics – RapidS/Serial Interface
AT45DB161D
(2.5V Version)
Symbol
f
SCK
f
CAR1
f
CAR2
t
WH
t
WL
t
SCKR(1)
t
SCKF(1)
t
CS
t
CSS
t
CSH
t
CSB
t
SU
t
H
t
HO
t
DIS
t
V
t
WPE
t
WPD
t
EDPD
t
RDPD
t
XFR
t
COMP
t
EP
t
P
t
PE
t
BE
t
SE
t
CE
t
RST
t
REC
Note:
Parameter
SCK Frequency
SCK Frequency for Continuous Array Read
SCK Frequency for Continuous Array Read
(Low Frequency)
SCK High Time
SCK Low Time
SCK Rise Time, Peak-to-Peak (Slew Rate)
SCK Fall Time, Peak-to-Peak (Slew Rate)
Minimum CS High Time
CS Setup Time
CS Hold Time
CS High to RDY/BUSY Low
Data In Setup Time
Data In Hold Time
Output Hold Time
Output Disable Time
Output Valid
WP Low to Protection Enabled
WP High to Protection Disabled
CS High to Deep Power-down Mode
CS High to Standby Mode
Page to Buffer Transfer Time
Page to Buffer Compare Time
Page Erase and Programming Time
(512/528 bytes)
Page Programming Time (512/528 bytes)
Page Erase Time (512/528 bytes)
Block Erase Time (4096/4224 bytes)
Sector Erase Time (131,072/135,168 bytes)
Chip Erase Time
RESET Pulse Width
RESET Recovery Time
10
1
17
3
15
45
1.6
TBD
2
3
0
27
35
8
1
1
3
35
200
200
40
6
35
100
5
TBD
10
1
17
3
15
45
1.6
TBD
6.8
6.8
0.1
0.1
50
5
5
100
2
3
0
27
35
6
1
1
3
35
200
200
40
6
35
100
5
TBD
Min
Typ
Max
50
50
33
6.8
6.8
0.1
0.1
50
5
5
100
Min
AT45DB161D
Typ
Max
66
66
33
Units
MHz
MHz
MHz
ns
ns
V/ns
V/ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
µs
ms
ms
ms
ms
s
s
µs
µs
1. Values are based on device characterization, not 100% tested in production.
35
3500M–DFLASH–04/09
ATMEL [ ATMEL CORPORATION ]
