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930104704 参数 Datasheet PDF下载

930104704图片预览
型号: 930104704
PDF下载: 下载PDF文件 查看货源
内容描述: 弧度。宽容128Kx8 , 5伏超低功耗CMOS SRAM [Rad. Tolerant 128Kx8, 5-Volt Very Low Power CMOS SRAM]
分类和应用: 存储内存集成电路静态存储器光电二极管异步传输模式ATM
文件页数/大小: 16 页 / 793 K
品牌: ATMEL [ ATMEL ]
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Write Cycle 3 CS1 or  
CS2, Controlled  
Note:  
The internal write time of the memory is defined by the overlap of CS1 Low and CS2 HIGH and W LOW. Both signals must be  
actived to initiate a write and either signal can terminate a write by going in actived. The data input setup and hold timing should  
be referenced to the actived edge of the signal that terminates the write. Data out is high impedance if OE = VIH.  
10  
M65608E  
4151N–AERO–04/09  
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