AT90USB82/162
Figure 9-1. Reset Logic
DATA BUS
MCU Status
Register (MCUSR)
Power-on Reset
Circuit
Brown-out
Reset Circuit
BODLEVEL [2..0]
Pull-up Resistor
SPIKE
FILTER
USB Device
Reset Detection
Watchdog
Oscillator
Delay Counters
Clock
CK
Generator
TIMEOUT
CKSEL[3:0]
SUT[1:0]
Table 9-1.
Symbol
Reset Characteristics
Parameter
Condition
Min
Typ
1.4
1.3
Max Units
Power-on Reset Threshold Voltage (rising)
Power-on Reset Threshold Voltage (falling)(1)
2.3
2.3
V
V
VPOT
VCC Start Voltage to ensure internal Power-
on Reset signal
VPOR
-0.1
0.8
0.1
V
VCC Rise Rate to ensure internal Power_on
Reset signal
VCCRR
V/ms
0.2
Vcc
0.85
Vcc
VRST
tRST
RESET Pin Threshold Voltage
V
Minimum pulse width on RESET Pin
5V, 25°C
400
ns
Notes: 1. The POR will not work unless the supply voltage has been below VPOT (falling)
9.3
Power-on Reset
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in Table 9-1. The POR is activated whenever VCC is below the detection level. The
POR circuit can be used to trigger the start-up Reset, as well as to detect a failure in supply
voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
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7707D–AVR–07/08
ATMEL [ ATMEL ]
