AT90USB64/128
Table 10-13. Overriding Signals for Alternate Functions PD7..PD4
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
PD7/T0
PD6/T1
PD5/XCK1
PD4/ICP1
0
0
0
0
0
0
0
0
0
0
XCK1 OUTPUT ENABLE
0
0
0
1
0
0
0
XCK1 OUTPUT ENABLE
0
0
0
XCK1 OUTPUT
0
0
0
0
0
0
0
0
0
T0 INPUT
–
T1 INPUT
–
XCK1 INPUT
–
ICP1 INPUT
–
AIO
Table 10-14. Overriding Signals for Alternate Functions in PD3..PD0(1)
PD1/INT1/SDA/ PD0/INT0/SCL/
Signal Name PD3/INT3/TXD1 PD2/INT2/RXD1
OC2B
OC0B
PUOE
PUOV
DDOE
DDOV
TXEN1
RXEN1
PORTD2 • PUD
RXEN1
0
TWEN
TWEN
0
PORTD1 • PUD PORTD0 • PUD
TXEN1
1
TWEN
TWEN
SDA_OUT
SCL_OUT
TWEN | OC2B
ENABLE
TWEN | OC0B
ENABLE
PVOE
TXEN1
0
PVOV
DIEOE
DIEOV
DI
TXD1
0
OC2B
OC0B
INT3 ENABLE
INT2 ENABLE
1
INT1 ENABLE
1
INT0 ENABLE
1
1
INT3 INPUT
–
INT2 INPUT/RXD1 INT1 INPUT
– SDA INPUT
INT0 INPUT
SCL INPUT
AIO
Note:
1. When enabled, the 2-wire Serial Interface enables Slew-Rate controls on the output pins PD0
and PD1. This is not shown in this table. In addition, spike filters are connected between the
AIO outputs shown in the port figure and the digital logic of the TWI module.
87
7593A–AVR–02/06
ATMEL [ ATMEL ]
