Description
The AT90S1200 is a low-power CMOS 8-bit microcontroller based on the AVR RISC
architecture. By executing powerful instructions in a single clock cycle, the AT90S1200
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to
optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with the 32 general purpose working reg-
isters. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),
allowing two independent registers to be accessed in one single instruction executed in
one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
Block Diagram
Figure 1. The AT90S1200 Block Diagram
The architecture supports high-level languages efficiently as well as extremely dense
assembler code programs. The AT90S1200 provides the following features: 1K byte of
In-System Programmable Flash, 64 bytes EEPROM, 15 general purpose I/O lines, 32
general purpose working registers, internal and external interrupts, programmable
watchdog timer with internal oscillator, an SPI serial port for program downloading and
two software selectable power-saving modes. The Idle Mode stops the CPU while allow-
2
AT90S1200
0838H–AVR–03/02
ATMEL [ ATMEL ]
