AT89C5132
Table 37. IPH1 Register
IPH1 (S:B3h) – Interrupt Priority High Register 1
7
-
6
5
–
4
3
2
1
0
IPHUSB
IPHKB
IPHADC
IPHSPI
IPHI2C
IPHMMC
Bit
Bit Number Mnemonic Description
Reserved
7
6
5
4
3
2
1
0
-
The value read from this bit is always 0. Do not set this bit.
USB Interrupt Priority Level MSB
Refer to Table 33 for priority level description.
IPHUSB
-
Reserved
The value read from this bit is always 0. Do not set this bit.
Keyboard Interrupt Priority Level MSB
IPHKB
IPHADC
IPHSPI
IPHI2C
IPHMMC
Refer to Table 33 for priority level description.
A to D Converter Interrupt Priority Level MSB
Refer to Table 33 for priority level description.
SPI Interrupt Priority Level MSB
Refer to Table 33 for priority level description.
Two Wire Controller Interrupt Priority Level MSB
Refer to Table 33 for priority level description.
MMC Interrupt Priority Level MSB
Refer to Table 33 for priority level description.
Reset Value = 0000 0000b
41
4173E–USB–09/07
ATMEL [ ATMEL ]
