AT85C51SND3Bx
Table 46. Memory Management SFRs
Mnemonic Add Name
7
6
5
4
4
4
3
2
1
0
MEMCBAX 0.F2h Memory CODE Base Address
MEMDBAX 0.F3h Memory DATA Base Address
MEMXBAX 0.F4h Memory XDATA Base Address
MEMCSX 0.F5h Memory CODE Size
CBAX16:9
DBAX16:9
XBAX16:9
CSX7:0
MEMXSX 0.F6h Memory XDATA Size
XSX7:0
Table 47. Scheduler SFRs
Mnemonic Add Name
7
6
5
3
2
1
0
SCHCLK
0.FEh Scheduler Clocks
-
SCHIDL2:0
-
-
-
-
SCHGPR3 Y.F9h 32-bit General Purpose Register
SCHGPR2 Y.FAh 32-bit General Purpose Register
SCHGPR1 Y. FBh 32-bit General Purpose Register
SCHGPR0 Y.FCh 32-bit General Purpose Register
GPR31:24
GPR23:16
GPR15:8
GPR7:0
Table 48. Data Flow Controller SFRs
Mnemonic Add Name
7
6
5
-
3
2
1
0
DFEN
DFBSY0
-
DFCON
1.89h DFC Control
DFRES
SRDY1
EOFE1
DFCRCEN
DFBSY1
-
DFPRIO1:0
DFABTM
EOFI0
DFCSTA
1.88h DFC Channel Status
DRDY1
EOFI1
EOFIA1
DRDY0
SRDY0
EOFE0
DFCCON 1.85h DFC Channel Control
DFABT1
DFABT0
EOFIA0
DFD0
1.8Ah DFC Channel 0 Descriptor
1.8Bh DFC Channel 1 Descriptor
1.8Ch DFC CRC16 Data
DFD0D7:0
DFD1
DFD1D7:0
CRCD7:0
DFCRC
Table 49. USB Controller SFRs
Mnemonic Add Name
7
6
5
4
3
2
1
0
USB General Registers
USBCON 1.E1h USB General Control
USBE
HOST
FRZCLK OTGPADE
-
-
-
-
-
IDTE
ID
VBUSTE
VBUS
USBSTA
USBINT
1.E2h USB General Status
1.E3h USB General Interrupt
-
-
-
-
-
-
-
-
-
-
SPEED
-
-
IDTI
VBUSTI
UDPADDH 1.E4h USB DPRAM Direct Access High
UDPADDL 1.E5h USB DPRAM Direct Access Low
OTGCON 1.E6h USB OTG Control
DPACC
DPADD10:8
DPADD7:0
HNPREQ SRPREQ SRPSEL VBUSHWC VBUSREQ VBUSRQC
-
-
-
-
-
-
OTGIEN
OTGINT
1.E7h USB OTG Interrupt Enable
1.D1h USB OTG Interrupt
STOE
STOI
HNPERRE ROLEEXE BCERRE VBERRE
HNPERRI ROLEEXI BCERRI VBERRI
SRPE
SRPI
39
7632A–MP3–03/06
ATMEL [ ATMEL ]
