Table 42. Interrupt SFRs
Mnemonic Add Name
7
6
5
4
3
2
1
0
IEN0
IEN1
IPH0
IPL0
IPH1
IPL1
0.A8h Interrupt Enable Control 0
EA
EAUP
EDFC
ES
ET1
EX1
ET0
EX0
0.B1h Interrupt Enable Control 1
-
-
-
-
-
-
EMMC
IPHDFC
IPLDFC
IPHMMC
IPLMMC
ENFC
IPHS
IPLS
ESPI
EPSI
EKB
EUSB
IPHX0
IPLX0
IPHUSB
IPLUSB
0.B7h Interrupt Priority Control High 0
0.B8h Interrupt Priority Control Low 0
0.B3h Interrupt Priority Control High 1
0.B2h Interrupt Priority Control Low 1
IPHAUP
IPHT1
IPLT1
IPHSPI
IPLSPI
IPHX1
IPLX1
IPHPSI
IPLPSI
IPHT0
IPLT0
IPHKB
IPLKB
IPLAUP
-
-
IPHNFC
IPLNFC
Table 43. I/O Port SFRs
Mnemonic Add Name
7
6
5
4
3
2
1
0
P0
P1
P2
P3
P4
P5
Y.80h 8-bit Port 0
Y.90h 8-bit Port 1
Y.A0h 8-bit Port 2
Y.B0h 8-bit Port 3
0.98h 8-bit Port 4
0.C8h 4-bit Port 5
Table 44. Timer SFRs
Mnemonic Add Name
7
6
5
4
3
2
1
0
TCON
TMOD
TL0
0.88h Timer/Counter 0 and 1 Control
TF1
TR1
TF0
M11
TR0
M01
IE1
IT1
IE0
M10
IT0
M00
0.89h Timer/Counter 0 and 1 Modes
0.8Ah Timer/Counter 0 Low Byte
0.8Ch Timer/Counter 0 High Byte
0.8Bh Timer/Counter 1 Low Byte
0.8Dh Timer/Counter 1 High Byte
GATE1
C/T1#
GATE0
C/T0#
TH0
TL1
TH1
WDTRST 0.A6h Watchdog Timer Reset
WDTPRG 0.A7h Watchdog Timer Program
-
-
-
-
-
WTO2:0
Table 45. RAM Interface
Mnemonic Add Name
7
RA7
RA15
-
6
RA6
RA14
-
5
RA5
RA13
-
4
RA4
RA12
-
3
RA3
RA11
-
2
RA2
RA10
-
1
RA1
RA9
-
0
RDFCAL
1.FDh RAM DFC Low Address Byte
RA0
RA8
RA16
RDFCAM 1.FEh RAM DFC Medium Address Byte
RDFCAH
1.FFh RAM DFC Higher Address Byte
38
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
