TS68EN360
7.21 SMC Transparent Mode Electrical Specifications
Table 7-20. GND = 0 VDC, TC = -55 to +125°C. The electrical specifications in this document are preliminary (See Figure
7-60)
25.0 MHz
33.34 MHz
Number Characteristic
Min
Max
–
Min
Max
–
Unit
ns
150(1)
SMCLK Clock Period
100
50
50
–
100
50
50
–
151
SMCLK Width Low
–
–
ns
151A
152
SMCLK Width High
–
–
ns
SMCLK Rise/Fall Time
15
50
–
15
50
–
ns
153
SMTXD Active Delay (from SMCLK falling edge)
SMRXD/SYNC1 Setup Time
SMRXD/SYNC1 Hold Time
10
20
5
10
20
5
ns
154
ns
155
–
–
ns
Note:
1. The ratio SyncCLK/SMCLK must be greater or equal to 2/1. SMC Transparent.
Figure 7-60. SMC Transparent
152
152
151A
151
SMCLK
150
TXD1
(OUTPUT)
Note 1
153
154
155
SYNC1
154
RXD1
(INPUT)
155
This delay is equal to an integer number of “Character length” clocks
Note:
67
2113B–HIREL–06/05
ATMEL [ ATMEL ]
